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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-08-07 06:58:34 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-08-07 07:01:40 +0200 |
| commit | d343f830f4dae8e84b4b44902347c60cf18b2ffd (patch) | |
| tree | db24951001d96347ec6a5a5536a80052a75391e7 | |
| parent | linkers/exeinfo: Report who inlines which functions. Report not inline functi... (diff) | |
| download | rtems-tools-d343f830f4dae8e84b4b44902347c60cf18b2ffd.tar.bz2 | |
tester: Exclude SMP build of some RISC-V BSPs
It makes no sense to build BSPs without support for atomic instructions
with SMP enabled.
Update #3433.
| -rw-r--r-- | tester/rtems/rtems-bsps-riscv.ini | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/tester/rtems/rtems-bsps-riscv.ini b/tester/rtems/rtems-bsps-riscv.ini index 986d639..da3a5a4 100644 --- a/tester/rtems/rtems-bsps-riscv.ini +++ b/tester/rtems/rtems-bsps-riscv.ini @@ -24,3 +24,4 @@ bsps = rv32iac, rv32i, rv32imac, rv32imafc, rv32imafdc, rv32imafd, rv32im, rv64imac, rv64imac_medany, rv64imafdc, rv64imafd, rv64imafdc_medany, rv64imafd_medany +exclude-smp = rv32i, rv32im |