BBB/AM335x: Store addresses of custom exception handlers in the Public RAM reserved for exception vectors

The AM335x jumps to a predefined location when handling an exception.  The default locations of the
exception handlers are tablified in Table 26-3 under Section 26.1.3.2 in the AM335x TRM.  When Umon
is executing and an exception occurs the AM335x will normally try to jump to the default exception
handler appropriate for the exception that has occured.  Since Umon defines a set of custom exception
handlers, the addresses of these exception handlers must be stored in the RAM exception vector
space in the Public RAM of the AM335x.  This is done so that when an exception occurs, instead of
program execution being transferred to one of the default exception handlers, it will instead be
transferred to a custom exception handler defined by Umon.

1 files changed, 37 insertions, 0 deletions

diff --git a/ports/beagleboneblack/rom_reset.S b/ports/beagleboneblack/rom_reset.S
index 176f3a7..83d79df 100644
--- a/ports/beagleboneblack/rom_reset.S
+++ b/ports/beagleboneblack/rom_reset.S
@@ -93,6 +93,43 @@ coldstart_1:
 	orr	r0,r0,#0xd3			// Set mode to supervisor, IRQ FIQ disabled.
 	msr	cpsr,r0
 
+	/* store the address of the custom exception handlers in the exception vector space
+	   of the AM335x Public RAM */
+	ldr r1, =undefined_instruction
+	movw r2, #0xce24
+	movt r2, #0x4030
+	str r1, [r2]
+
+	ldr r1, =software_interrupt
+	movw r2, #0xce28
+	movt r2, #0x4030
+	str r1, [r2]
+
+	ldr r1, =abort_prefetch
+	movw r2, #0xce2c
+	movt r2, #0x4030
+	str r1, [r2]
+
+	ldr r1, =abort_data
+	movw r2, #0xce30
+	movt r2, #0x4030
+	str r1, [r2]
+
+	ldr r1, =not_assigned
+	movw r2, #0xce34
+	movt r2, #0x4030
+	str r1, [r2]
+
+	ldr r1, =interrupt_request
+	movw r2, #0xce38
+	movt r2, #0x4030
+	str r1, [r2]
+
+	ldr r1, =fast_interrupt_request
+	movw r2, #0xce3c
+	movt r2, #0x4030
+	str r1, [r2]
+
 //	bl cache_init
 
 /********************************************************************/