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Simple Instruction Simulator
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Author
Age
Files
Lines
*
Bumped version to 2.30
2.30
Jiri Gaisler
2022-10-26
1
-1
/
+1
*
Support extended interrupts
2.29
Sebastian Huber
2021-08-04
1
-1
/
+1
*
Added GR740 L2 configuration register
2.28
Jiri Gaisler
2021-07-30
1
-1
/
+1
*
Added simple RISC-V PLIC functionality for NS16550 interrupt
Jiri Gaisler
2021-06-10
1
-1
/
+1
*
Added support for RISCV32 systems with CLINT/PLIC
Jiri Gaisler
2020-12-15
1
-1
/
+1
*
Added emulation of GR740 SOC
2.25
Jiri Gaisler
2020-12-01
1
-1
/
+1
*
Add %asr22/23 support to leon3
2.24
Jiri Gaisler
2020-11-27
1
-1
/
+1
*
Add networking support using host tap device
2.23
Jiri Gaisler
2020-10-28
1
-1
/
+1
*
Update to version 2.22
2.22
Jiri Gaisler
2020-09-09
1
-1
/
+1
*
Update to version 2.21
2.21
Jiri Gaisler
2020-02-29
1
-1
/
+1
*
Cross-platform support for async gdb break (ctrl-c)
Jiri Gaisler
2019-11-14
1
-1
/
+1
*
Support building on MinGW-W64/MSYS2
2.19
Jiri Gaisler
2019-11-09
1
-1
/
+8
*
Release version 2.18
2.18
Jiri Gaisler
2019-11-02
1
-1
/
+1
*
Updated to version 2.17
2.17
Jiri Gaisler
2019-07-03
1
-1
/
+1
*
Make readline conditional and add linenoise it not present.
Chris Johns
2019-07-02
1
-5
/
+6
*
Updated version to 2.16
2.16
Jiri Gaisler
2019-06-12
1
-1
/
+1
*
Made L1 cache optional through --enable-l1cache
Jiri Gaisler
2019-05-28
1
-2
/
+8
*
Standalone sis - initial commit
Jiri Gaisler
2019-05-14
1
-0
/
+15
