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author | Jiri Gaisler <jiri@gaisler.se> | 2019-05-28 00:02:40 +0200 |
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committer | Jiri Gaisler <jiri@gaisler.se> | 2019-05-28 00:09:27 +0200 |
commit | 9277f1913aa341efbf6d111ec25e1dc863158cf5 (patch) | |
tree | 71fd2e77837ad5cd15d732ec208bfeca990ed275 /sis.c | |
parent | Add emulated L1 cache to SMP configurations (diff) | |
download | sis-9277f1913aa341efbf6d111ec25e1dc863158cf5.tar.bz2 |
Made L1 cache optional through --enable-l1cache
* Removed stale config.h
* Updated autoconf script with relevant checks
* Re-implemented leon3/grlib timer with less events
* Bumped version to 2.15
Diffstat (limited to 'sis.c')
-rw-r--r-- | sis.c | 4 |
1 files changed, 4 insertions, 0 deletions
@@ -26,6 +26,7 @@ #include <fcntl.h> #include "sis.h" #include <inttypes.h> +#include <libgen.h> /* Structures and functions from readline library */ @@ -184,9 +185,12 @@ main(argc, argv) if (!freq) freq = 14; } +#ifdef ENABLE_L1CACHE if (ncpu > 1) printf(" L1 cache: %dK/%dK, %d bytes/line \n", (1 << (L1IBITS - 10)), (1 << (L1DBITS - 10)), (1 << L1ILINEBITS)); +#endif + if (nfp) printf(" FPU disabled\n"); ebase.freq = freq; |