summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorOliver Kleinke <oliver.kleinke@c-01a.de>2023-05-26 13:10:39 +0200
committerJiri Gaisler <jiri@gaisler.se>2023-06-06 22:01:35 +0200
commit9756ed371db6fc1babe3949a738d9e2f676d141e (patch)
tree810aa081e8b524a1c518c1f90ba58e36d61b3d87
parentFix removing software breakpoints (diff)
downloadsis-9756ed371db6fc1babe3949a738d9e2f676d141e.tar.bz2
leon3/gptimer: Set IP bit on interrupt
Setting the IP bit in the GPTIMER CTRL register is necessary, if using shared interrupts, to determine which of the timers generated the interrupt. The IP bit is cleared when a one is written to it.
-rw-r--r--grlib.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/grlib.c b/grlib.c
index c2d2acf..29785d3 100644
--- a/grlib.c
+++ b/grlib.c
@@ -753,6 +753,8 @@ gpt_intr (int32 i)
}
if (gpt_ctrl[i] & 8)
{
+ /* Set Interrupt Pending (IP) bit to allow for shared interrupt handling */
+ gpt_ctrl[i] |= 0x10;
grlib_set_irq (gpt_irq + i);
}
gpt_add_intr (i);
@@ -827,6 +829,12 @@ gpt_ctrl_write (uint32 val, int i)
gpt_add_intr (i);
}
gpt_ctrl[i] = val & 0xb;
+
+ if (val & 0x10)
+ {
+ /* Clear Interrupt Pending (IP) bit if a 1 is written to it */
+ gpt_ctrl[i] &= ~0x10;
+ }
}
static uint32