diff options
Diffstat (limited to 'cpukit/score/cpu/arm/armv4-exception-default.S')
| -rw-r--r-- | cpukit/score/cpu/arm/armv4-exception-default.S | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/cpukit/score/cpu/arm/armv4-exception-default.S b/cpukit/score/cpu/arm/armv4-exception-default.S index a10de301b0..763913b09e 100644 --- a/cpukit/score/cpu/arm/armv4-exception-default.S +++ b/cpukit/score/cpu/arm/armv4-exception-default.S @@ -103,21 +103,39 @@ _ARMV4_Exception_fiq_default: * Don't enable FIQs yet. Set the FIQ disable bit in the SPSR * (which we'll load into the CPSR in save_more_context). */ +#ifdef RTEMS_PARAVIRT_XTRATUM + udf #4 +#endif mrs r2, spsr orr r2, #ARM_PSR_F +#ifdef RTEMS_PARAVIRT_XTRATUM + udf #5 +#endif msr spsr_c, r2 save_more_context: /* Save more context */ mov r2, lr +#ifdef RTEMS_PARAVIRT_XTRATUM + udf #4 +#endif mrs r3, spsr +#ifdef RTEMS_PARAVIRT_XTRATUM + udf #4 +#endif mrs r7, cpsr orr r5, r3, #ARM_PSR_I bic r5, #ARM_PSR_T +#ifdef RTEMS_PARAVIRT_XTRATUM + udf #5 +#endif msr cpsr, r5 mov r0, sp mov r1, lr +#ifdef RTEMS_PARAVIRT_XTRATUM + udf #5 +#endif msr cpsr, r7 mov r5, #0 add r6, sp, #ARM_EXCEPTION_FRAME_REGISTER_SP_OFFSET |