diff options
Diffstat (limited to 'c/src/lib/libbsp/arm/shared/start/start.S')
| -rwxr-xr-x | c/src/lib/libbsp/arm/shared/start/start.S | 38 |
1 files changed, 37 insertions, 1 deletions
diff --git a/c/src/lib/libbsp/arm/shared/start/start.S b/c/src/lib/libbsp/arm/shared/start/start.S index 547cce3d2c..f96e536a90 100755 --- a/c/src/lib/libbsp/arm/shared/start/start.S +++ b/c/src/lib/libbsp/arm/shared/start/start.S @@ -5,7 +5,7 @@ */ /* - * Copyright (c) 2008, 2016 embedded brains GmbH. All rights reserved. + * Copyright (c) 2008, 2017 embedded brains GmbH. All rights reserved. * * embedded brains GmbH * Dornierstr. 4 @@ -13,6 +13,9 @@ * Germany * <rtems@embedded-brains.de> * + * Copyright 2016 Fent Innovative Software Solutions (FENTISS). + * All rights reserved. + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * http://www.rtems.org/license/LICENSE. @@ -26,6 +29,14 @@ #include <bsp/irq.h> #include <bsp/linker-symbols.h> +#ifdef RTEMS_PARAVIRT_XTRATUM +#define MSR_OPCODE 5 +#define MRC_OPCODE 13 +#define XM_SI(si) udf si +#else +#define XM_SI(si) +#endif + /* External symbols */ .extern bsp_reset .extern boot_card @@ -171,6 +182,10 @@ bsp_start_hyp_vector_table_end: /* Start entry */ _start: +#ifdef RTEMS_PARAVIRT_XTRATUM + ldr r1, =pctrl_addr + str r0, [r1] +#endif /* * We do not save the context since we do not return to the boot @@ -190,6 +205,7 @@ _start: #ifdef RTEMS_SMP /* Read MPIDR and get current processor index */ + XM_SI(MRC_OPCODE) mrc p15, 0, r0, c0, c0, 5 and r0, #0xff @@ -209,6 +225,7 @@ _start: mrs r4, cpsr /* save original procesor status value */ #ifdef BSP_START_IN_HYP_SUPPORT orr r0, r4, #(ARM_PSR_I | ARM_PSR_F) + XM_SI(MSR_OPCODE) msr cpsr, r4 and r0, r4, #ARM_PSR_M_MASK @@ -228,12 +245,14 @@ bsp_start_skip_hyp_svc_switch: * Set SVC mode, disable interrupts and enable ARM instructions. */ mov r0, #(ARM_PSR_M_SVC | ARM_PSR_I | ARM_PSR_F) + XM_SI(MSR_OPCODE) msr cpsr, r0 /* Initialize stack pointer registers for the various modes */ /* Enter IRQ mode and set up the IRQ stack pointer */ mov r0, #(ARM_PSR_M_IRQ | ARM_PSR_I | ARM_PSR_F) + XM_SI(MSR_OPCODE) msr cpsr, r0 ldr sp, =bsp_stack_irq_end #ifdef RTEMS_SMP @@ -242,6 +261,7 @@ bsp_start_skip_hyp_svc_switch: /* Enter FIQ mode and set up the FIQ stack pointer */ mov r0, #(ARM_PSR_M_FIQ | ARM_PSR_I | ARM_PSR_F) + XM_SI(MSR_OPCODE) msr cpsr, r0 ldr sp, =bsp_stack_fiq_end #ifdef RTEMS_SMP @@ -254,6 +274,7 @@ bsp_start_skip_hyp_svc_switch: /* Enter ABT mode and set up the ABT stack pointer */ mov r0, #(ARM_PSR_M_ABT | ARM_PSR_I | ARM_PSR_F) + XM_SI(MSR_OPCODE) msr cpsr, r0 ldr sp, =bsp_stack_abt_end #ifdef RTEMS_SMP @@ -262,6 +283,7 @@ bsp_start_skip_hyp_svc_switch: /* Enter UND mode and set up the UND stack pointer */ mov r0, #(ARM_PSR_M_UND | ARM_PSR_I | ARM_PSR_F) + XM_SI(MSR_OPCODE) msr cpsr, r0 ldr sp, =bsp_stack_und_end #ifdef RTEMS_SMP @@ -270,6 +292,7 @@ bsp_start_skip_hyp_svc_switch: /* Enter SVC mode and set up the SVC stack pointer */ mov r0, #(ARM_PSR_M_SVC | ARM_PSR_I | ARM_PSR_F) + XM_SI(MSR_OPCODE) msr cpsr, r0 ldr sp, =bsp_stack_svc_end #ifdef RTEMS_SMP @@ -281,6 +304,7 @@ bsp_start_skip_hyp_svc_switch: #ifdef ARM_MULTILIB_VFP #ifdef ARM_MULTILIB_HAS_CPACR /* Read CPACR */ + XM_SI(MRC_OPCODE) mrc p15, 0, r0, c1, c0, 2 /* Enable CP10 and CP11 */ @@ -361,6 +385,12 @@ bsp_vector_table_copy_done: /* Branch to start hook 1 */ bl bsp_start_hook_1 +#ifdef RTEMS_PARAVIRT_XTRATUM + ldr r1, =pctrl_addr + ldr r0, [r1] + blx init_libxm +#endif + /* Branch to boot card */ mov r0, #0 bl boot_card @@ -453,3 +483,9 @@ twiddle: .set bsp_start_vector_table_size, bsp_start_vector_table_end - bsp_start_vector_table_begin .set bsp_vector_table_size, bsp_start_vector_table_size + +#ifdef RTEMS_PARAVIRT_XTRATUM +.align 4 +pctrl_addr: + .word 0 +#endif |