blob: 5338538de04b25969bdf9dd2f15c438463d82adc (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
|
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
actions:
- get-integer: null
- define: null
build-type: option
copyrights:
- Copyright (C) 2022 embedded brains GmbH & Co. KG
default:
- enabled-by:
- aarch64/a53_ilp32_qemu
- aarch64/a53_lp64_qemu
- aarch64/a72_ilp32_qemu
- aarch64/a72_lp64_qemu
- aarch64/raspberrypi4b
- aarch64/xilinx_versal_aiedge
- aarch64/xilinx_versal_qemu
- aarch64/xilinx_versal_vck190
- aarch64/xilinx_zynqmp_ilp32_qemu
- aarch64/xilinx_zynqmp_ilp32_zu3eg
- aarch64/xilinx_zynqmp_lp64_cfc400x
- aarch64/xilinx_zynqmp_lp64_qemu
- aarch64/xilinx_zynqmp_lp64_zu3eg
value: null
- enabled-by: true
value: 0x00000002
description: |
Defines the initial value of the ICC_BPR0 register of the ARM GIC CPU
Interface. The value is optional. If it is not defined, then the register
is not initialized.
enabled-by: true
format: '{:#010x}'
links: []
name: BSP_ARM_GIC_ICC_BPR0
type: build
|
