1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
|
/*
* Copyright (c) 2014 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Dornierstr. 4
* 82178 Puchheim
* Germany
* <rtems@embedded-brains.de>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#if HAVE_CONFIG_H
#include "config.h"
#endif
#include <rtems/score/cpuopts.h>
#include <rtems/score/isrlevel.h>
/*
* This file is a dirty hack. A proper solution would be to add RTEMS support
* for libatomic in GCC (see also libatomic/configure.tgt).
*/
#if defined(RTEMS_SMP)
static volatile uint32_t _SPARCV8_The_one_lock;
static inline uint32_t _SPARCV8_Atomic_swap(
volatile uint32_t *address,
uint32_t value
)
{
asm volatile (
"swap [%2], %0"
: "=r" (value)
: "0" (value), "r" (address)
: "memory"
);
return value;
}
#endif
static ISR_Level _SPARCV8_Acquire_the_one_lock( void )
{
ISR_Level level;
_ISR_Disable_without_giant( level );
#if defined(RTEMS_SMP)
do {
while ( _SPARCV8_The_one_lock ) {
/* Wait */
}
} while ( _SPARCV8_Atomic_swap( &_SPARCV8_The_one_lock, 1 ) );
#endif
return level;
}
static void _SPARCV8_Release_the_one_lock( ISR_Level level )
{
#if defined(RTEMS_SMP)
_SPARCV8_The_one_lock = 0;
#endif
_ISR_Enable_without_giant( level );
}
uint8_t __atomic_exchange_1( uint8_t *mem, uint8_t val, int model )
{
uint8_t prev;
ISR_Level level;
level = _SPARCV8_Acquire_the_one_lock();
prev = *mem;
*mem = val;
_SPARCV8_Release_the_one_lock( level );
return prev;
}
uint32_t __atomic_exchange_4( uint32_t *mem, uint32_t val, int model )
{
uint32_t prev;
ISR_Level level;
level = _SPARCV8_Acquire_the_one_lock();
prev = *mem;
*mem = val;
_SPARCV8_Release_the_one_lock( level );
return prev;
}
/*
* You get probably a warning here which can be ignored: "warning: conflicting
* types for built-in function '__atomic_compare_exchange_4' [enabled by
* default]"
*/
bool __atomic_compare_exchange_4(
uint32_t *mem,
uint32_t *expected,
uint32_t desired,
int success,
int failure
)
{
bool equal;
ISR_Level level;
level = _SPARCV8_Acquire_the_one_lock();
equal = *mem == *expected;
if ( equal ) {
*mem = desired;
}
_SPARCV8_Release_the_one_lock( level );
return equal;
}
uint32_t __atomic_fetch_add_4( uint32_t *mem, uint32_t val, int model )
{
uint32_t prev;
ISR_Level level;
level = _SPARCV8_Acquire_the_one_lock();
prev = *mem;
*mem = prev + val;
_SPARCV8_Release_the_one_lock( level );
return prev;
}
uint32_t __atomic_fetch_sub_4( uint32_t *mem, uint32_t val, int model )
{
uint32_t prev;
ISR_Level level;
level = _SPARCV8_Acquire_the_one_lock();
prev = *mem;
*mem = prev - val;
_SPARCV8_Release_the_one_lock( level );
return prev;
}
uint32_t __atomic_fetch_and_4( uint32_t *mem, uint32_t val, int model )
{
uint32_t prev;
ISR_Level level;
level = _SPARCV8_Acquire_the_one_lock();
prev = *mem;
*mem = prev & val;
_SPARCV8_Release_the_one_lock( level );
return prev;
}
uint32_t __atomic_fetch_or_4( uint32_t *mem, uint32_t val, int model )
{
uint32_t prev;
ISR_Level level;
level = _SPARCV8_Acquire_the_one_lock();
prev = *mem;
*mem = prev | val;
_SPARCV8_Release_the_one_lock( level );
return prev;
}
uint32_t __atomic_fetch_xor_4( uint32_t *mem, uint32_t val, int model )
{
uint32_t prev;
ISR_Level level;
level = _SPARCV8_Acquire_the_one_lock();
prev = *mem;
*mem = prev ^ val;
_SPARCV8_Release_the_one_lock( level );
return prev;
}
|
