blob: 78b87ef98121e070c6363a0020079ca590c74f86 (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
|
/**
* @file
*
* @brief CPU Port Implementation API
*/
/*
* Copyright (c) 2013 embedded brains GmbH
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifndef _RTEMS_SCORE_CPUIMPL_H
#define _RTEMS_SCORE_CPUIMPL_H
#include <rtems/score/cpu.h>
#define CPU_PER_CPU_CONTROL_SIZE 0
#ifndef ASM
#ifdef __cplusplus
extern "C" {
#endif
RTEMS_INLINE_ROUTINE void _CPU_Context_volatile_clobber( uintptr_t pattern )
{
/* TODO */
}
RTEMS_INLINE_ROUTINE void _CPU_Context_validate( uintptr_t pattern )
{
while (1) {
/* TODO */
}
}
RTEMS_INLINE_ROUTINE void _CPU_Instruction_illegal( void )
{
__asm__ volatile ( ".word 0" );
}
RTEMS_INLINE_ROUTINE void _CPU_Instruction_no_operation( void )
{
__asm__ volatile ( "nop" );
}
#ifdef __cplusplus
}
#endif
#endif /* ASM */
#endif /* _RTEMS_SCORE_CPUIMPL_H */
|