1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
|
This SONIC driver does not make any attempt to support the SONIC chip
in any of the following modes:
+ 16-bit
+ little endian
It does not attempt to handle SONIC's older than Revision C. There is
a bug in chips before that revision that must be handled in the driver.
The configuration table should be discussed here but if you look in the
include file for the sonic, it is reasonably obvious. :)
The performance impact of transforming this driver into libchip format
was minimal.
The powerpc/dmv177 BSP used this driver and the following should
serve as an example configuration table. This BSP was obsoleted after
the 4.6 release series so the code is included here.
======================================================================
/*
* DMV177 SONIC Configuration Information
*
* References:
*
* 1) SVME/DMV-171 Single Board Computer Documentation Package, #805905,
* DY 4 Systems Inc., Kanata, Ontario, September, 1996.
*/
#include <bsp.h>
#include <rtems/rtems_bsdnet.h>
#include <libchip/sonic.h>
void dmv177_sonic_write_register(
void *base,
unsigned32 regno,
unsigned32 value
)
{
volatile unsigned32 *p = base;
#if (SONIC_DEBUG & SONIC_DEBUG_PRINT_REGISTERS)
printf( "%p Write 0x%04x to %s (0x%02x)\n",
&p[regno], value, SONIC_Reg_name[regno], regno );
fflush( stdout );
#endif
p[regno] = value;
}
unsigned32 dmv177_sonic_read_register(
void *base,
unsigned32 regno
)
{
volatile unsigned32 *p = base;
unsigned32 value;
value = p[regno];
#if (SONIC_DEBUG & SONIC_DEBUG_PRINT_REGISTERS)
printf( "%p Read 0x%04x from %s (0x%02x)\n",
&p[regno], value, SONIC_Reg_name[regno], regno );
fflush( stdout );
#endif
return value;
}
/*
* Default sizes of transmit and receive descriptor areas
*/
#define RDA_COUNT 20 /* 20 */
#define TDA_COUNT 20 /* 10 */
/*
* Default device configuration register values
* Conservative, generic values.
* DCR:
* No extended bus mode
* Unlatched bus retry
* Programmable outputs unused
* Asynchronous bus mode
* User definable pins unused
* No wait states (access time controlled by DTACK*)
* 32-bit DMA
* Empty/Fill DMA mode
* Maximum Transmit/Receive FIFO
* DC2:
* Extended programmable outputs unused
* Normal HOLD request
* Packet compress output unused
* No reject on CAM match
*/
#define SONIC_DCR \
(DCR_DW32 | DCR_WAIT0 | DCR_PO0 | DCR_PO1 | DCR_RFT24 | DCR_TFT28)
#ifndef SONIC_DCR
# define SONIC_DCR (DCR_DW32 | DCR_TFT28)
#endif
#ifndef SONIC_DC2
# define SONIC_DC2 (0)
#endif
/*
* Default location of device registers
*/
#ifndef SONIC_BASE_ADDRESS
# define SONIC_BASE_ADDRESS 0xF3000000
# warning "Using default SONIC_BASE_ADDRESS."
#endif
/*
* Default interrupt vector
*/
#ifndef SONIC_VECTOR
# define SONIC_VECTOR 1
# warning "Using default SONIC_VECTOR."
#endif
sonic_configuration_t dmv177_sonic_configuration = {
SONIC_BASE_ADDRESS, /* base address */
SONIC_VECTOR, /* vector number */
SONIC_DCR, /* DCR register value */
SONIC_DC2, /* DC2 register value */
TDA_COUNT, /* number of transmit descriptors */
RDA_COUNT, /* number of receive descriptors */
dmv177_sonic_write_register,
dmv177_sonic_read_register
};
int rtems_dmv177_sonic_driver_attach(struct rtems_bsdnet_ifconfig *config)
{
return rtems_sonic_driver_attach( config, &dmv177_sonic_configuration );
}
======================================================================
|
