summaryrefslogtreecommitdiffstats
path: root/c/src/lib/libbsp/powerpc/mvme3100/irq/irq.h
blob: 9f7c907df5fee91bd436340c86a2896464bc0189 (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
/**
 *  @file
 *
 *  @ingroup powerpc_irq
 *
 *  @brief This include file describe the data structure and the functions
 *  implemented by RTEMS to write interrupt handlers.
 */

/* irq.h
 *
 *  This include file describe the data structure and the functions implemented
 *  by RTEMS to write interrupt handlers.
 *
 *  Copyright (C) 1999 valette@crf.canon.fr
 *
 *  This code is heavilly inspired by the public specification of STREAM V2
 *  that can be found at :
 *
 *      <http://www.chorus.com/Documentation/index.html> by following
 *  the STREAM API Specification Document link.
 *
 *  The license and distribution terms for this file may be
 *  found in the file LICENSE in this distribution or at
 *  http://www.rtems.com/license/LICENSE.
 *
 *  Adapted for the mvme3100 BSP by T. Straumann, 2007.
 */

#ifndef BSP_POWERPC_IRQ_H
#define BSP_POWERPC_IRQ_H

#define BSP_SHARED_HANDLER_SUPPORT      1
#include <rtems/irq.h>

#ifndef ASM

#ifdef __cplusplus
extern "C" {
#endif

/**
 *  @defgroup powerpc_irq Definitions
 *
 *  @ingroup powerpc_mvme3100
 *
 *  @brief rtems_irq_number Definitions
 */

/* Must pad number of external sources to 16 because
 * of the layout of vector/priority registers in the
 * 8540's openpic where there is a gap between
 * registers corresponding to external and core sources.
 */
#define BSP_EXT_IRQ_NUMBER          (16)
#define BSP_CORE_IRQ_NUMBER			(32)

/* openpic glue code from shared/irq assigns priorities and configures
 * initial ISRs for BSP_PCI_IRQ_NUMBER entries (plus ISA stuff on legacy
 * boards). Hence PCI_IRQ_NUMBER must also cover the internal sources
 * even though they have nothing to do with PCI.
 */
#define BSP_PCI_IRQ_NUMBER			(BSP_EXT_IRQ_NUMBER + BSP_CORE_IRQ_NUMBER)
#define BSP_PCI_IRQ_LOWEST_OFFSET	(0)
#define BSP_PCI_IRQ_MAX_OFFSET		(BSP_PCI_IRQ_LOWEST_OFFSET + BSP_PCI_IRQ_NUMBER - 1)

#define BSP_CORE_IRQ_LOWEST_OFFSET  (BSP_PCI_IRQ_LOWEST_OFFSET + BSP_EXT_IRQ_NUMBER)
#define BSP_CORE_IRQ_MAX_OFFSET		(BSP_CORE_IRQ_LOWEST_OFFSET + BSP_CORE_IRQ_NUMBER - 1)

/*
 * PowerPC exceptions handled as interrupt where an RTEMS managed interrupt
 * handler might be connected
 */
#define BSP_PROCESSOR_IRQ_NUMBER	(1)
#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_CORE_IRQ_MAX_OFFSET + 1)
#define BSP_PROCESSOR_IRQ_MAX_OFFSET	(BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1)
/* Misc vectors for OPENPIC irqs (IPI, timers)
 */
#define BSP_MISC_IRQ_NUMBER		(8)
#define BSP_MISC_IRQ_LOWEST_OFFSET	(BSP_PROCESSOR_IRQ_MAX_OFFSET + 1)
#define BSP_MISC_IRQ_MAX_OFFSET		(BSP_MISC_IRQ_LOWEST_OFFSET + BSP_MISC_IRQ_NUMBER - 1)
/*
 * Summary
 */
#define BSP_IRQ_NUMBER			(BSP_MISC_IRQ_MAX_OFFSET + 1)
#define BSP_LOWEST_OFFSET		(BSP_PCI_IRQ_LOWEST_OFFSET)
#define BSP_MAX_OFFSET			(BSP_MISC_IRQ_MAX_OFFSET)

/*
 * Some PCI IRQ symbolic name definition
 */
#define BSP_PCI_IRQ0			(BSP_PCI_IRQ_LOWEST_OFFSET)

#define BSP_VME0_IRQ			(BSP_PCI_IRQ_LOWEST_OFFSET  +  0)
#define BSP_VME1_IRQ			(BSP_PCI_IRQ_LOWEST_OFFSET  +  1)
#define BSP_VME2_IRQ			(BSP_PCI_IRQ_LOWEST_OFFSET  +  2)
#define BSP_VME3_IRQ			(BSP_PCI_IRQ_LOWEST_OFFSET  +  3)

#define BSP_ABORT_IRQ			(BSP_PCI_IRQ_LOWEST_OFFSET  +  8)
#define BSP_TEMP_IRQ			(BSP_PCI_IRQ_LOWEST_OFFSET  +  9)
#define BSP_PHY_IRQ				(BSP_PCI_IRQ_LOWEST_OFFSET  + 10)
#define BSP_RTC_IRQ				(BSP_PCI_IRQ_LOWEST_OFFSET  + 11)

/* Weird - they provide 3 different IRQ lines per ethernet controller
 * but only one shared line for 2 UARTs ???
 */
#define BSP_UART_COM1_IRQ		(BSP_CORE_IRQ_LOWEST_OFFSET + 26)
#define BSP_UART_COM2_IRQ		(BSP_CORE_IRQ_LOWEST_OFFSET + 26)
#define BSP_I2C_IRQ				(BSP_CORE_IRQ_LOWEST_OFFSET + 27)

/*
 * Some internal (CORE) name definitions
 */
/* Ethernet (FEC) */
#define BSP_CORE_IRQ_FEC		(BSP_CORE_IRQ_LOWEST_OFFSET + 25)
/* i2c controller */
#define BSP_CORE_IRQ_I2C		(BSP_CORE_IRQ_LOWEST_OFFSET + 27)

/*
 * Some Processor execption handled as RTEMS IRQ symbolic name definition
 */
#define BSP_DECREMENTER			(BSP_PROCESSOR_IRQ_LOWEST_OFFSET)

/*-------------------------------------------------------------------------+
| Function Prototypes.
+--------------------------------------------------------------------------*/

extern void BSP_rtems_irq_mng_init(unsigned cpuId);

#include <bsp/irq_supp.h>

#ifdef __cplusplus
};
#endif

#endif
#endif