blob: caac8ee98041a752d1e2bb57453857114ca3454a (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
|
/**
* @file
*/
/*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*/
#ifndef _RTEMS_TMTEST27
#error "This is an RTEMS internal file you must not include directly."
#endif
#ifndef __tm27_h
#define __tm27_h
#include <bsp/irq.h>
/*
* Define the interrupt mechanism for Time Test 27
*/
int assert_sw_irw(uint32_t irqnum);
int negate_sw_irw(uint32_t irqnum);
#define MUST_WAIT_FOR_INTERRUPT 0
#define Install_tm27_vector( handler ) \
rtems_interrupt_handler_install( \
AU1X00_IRQ_SW0, "benchmark", 0, (rtems_interrupt_handler)handler, NULL );
#define Cause_tm27_intr() \
do { \
assert_sw_irq(0); \
} while(0)
#define Clear_tm27_intr() \
do { \
negate_sw_irq(0); \
} while(0)
#define Lower_tm27_intr() \
do { \
continue;\
} while(0)
#endif
|