blob: c3476cd1596c0c657520770be935939cc6fdc84b (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
|
/* bsp.h
*
* This include file contains all MVME136 board IO definitions.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* $Id$
*/
#ifndef __MVME136_h
#define __MVME136_h
#ifdef __cplusplus
extern "C" {
#endif
#include <bspopts.h>
#include <rtems.h>
#include <rtems/clockdrv.h>
#include <rtems/console.h>
#include <rtems/iosupp.h>
/*
* confdefs.h overrides for this BSP:
* - number of termios serial ports (defaults to 1)
* - Interrupt stack space is not minimum if defined.
*/
/* #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 */
#define CONFIGURE_INTERRUPT_STACK_MEMORY (4 * 1024)
/*
* Simple spin delay in microsecond units for device drivers.
* This is very dependent on the clock speed of the target.
*/
#define rtems_bsp_delay( microseconds ) \
{ register uint32_t _delay=(microseconds); \
register uint32_t _tmp=123; \
asm volatile( "0: \
nbcd %0 ; \
nbcd %0 ; \
dbf %1,0b" \
: "=d" (_tmp), "=d" (_delay) \
: "0" (_tmp), "1" (_delay) ); \
}
/* Constants */
#define RAM_START 0
#define RAM_END 0x100000
#define M681ADDR 0xfffb0040 /* address of the M68681 chip */
#define RXRDYB 0x01 /* status reg recv ready mask */
#define TXRDYB 0x04 /* status reg trans ready mask */
#define PARITYERR 0x20 /* status reg parity error mask */
#define FRAMEERR 0x40 /* status reg frame error mask */
#define FOREVER 1 /* infinite loop */
/* Structures */
struct r_m681_info {
char fill1[ 5 ]; /* channel A regs ( not used ) */
char isr; /* interrupt status reg */
char fill2[ 2 ]; /* counter regs (not used) */
char mr1mr2b; /* MR1B and MR2B regs */
char srb; /* status reg channel B */
char fill3; /* do not access */
char rbb; /* receive buffer channel B */
char ivr; /* interrupt vector register */
};
struct w_m681_info {
char fill1[ 4 ]; /* channel A regs (not used) */
char acr; /* auxillary control reg */
char imr; /* interrupt mask reg */
char fill2[ 2 ]; /* counter regs (not used) */
char mr1mr2b; /* MR1B and MR2B regs */
char csrb; /* clock select reg */
char crb; /* command reg */
char tbb; /* transmit buffer channel B */
char ivr; /* interrupt vector register */
};
#ifdef M136_INIT
#undef EXTERN
#define EXTERN
#else
#undef EXTERN
#define EXTERN extern
#endif
/* miscellaneous stuff assumed to exist */
extern rtems_configuration_table BSP_Configuration;
/* M68681 DUART chip register variables */
EXTERN volatile struct r_m681_info *_Read_m681; /* M68681 read registers */
EXTERN volatile struct w_m681_info *_Write_m681; /* M68681 write registers */
extern m68k_isr_entry M68Kvec[]; /* vector table address */
/*
* Device Driver Table Entries
*/
/*
* NOTE: Use the standard Console driver entry
*/
/*
* NOTE: Use the standard Clock driver entry
*/
/* functions */
void bsp_cleanup( void );
m68k_isr_entry set_vector(
rtems_isr_entry handler,
rtems_vector_number vector,
int type
);
#ifdef __cplusplus
}
#endif
#endif
/* end of include file */
|
