summaryrefslogtreecommitdiffstats
path: root/c/src/lib/libbsp/m68k/mvme136/clock/ckinit.c
blob: 02115c431ce64d4062f74465d0b6bbe98f1492a8 (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
/*
 *  This routine initializes the Z80386 1 on the MVME136 board.
 *  The tick frequency is 1 millisecond.
 */

/*
 *  COPYRIGHT (c) 1989-1999.
 *  On-Line Applications Research Corporation (OAR).
 *
 *  The license and distribution terms for this file may be
 *  found in the file LICENSE in this distribution or at
 *  http://www.rtems.org/license/LICENSE.
 */

#include <stdlib.h>

#include <bsp.h>
#include <rtems/zilog/z8036.h>

#define MICRVAL     0xe2            /* disable lower chain, no vec */
                                    /*  set right justified addr */
                                    /*  and master int enable */
#define MCCRVAL     0xc4            /* enable T1 and port B */
                                    /*   timers independent */
#define MS_COUNT    0x07d0          /* T1's countdown constant (1 ms) */
#define T1MSRVAL    0x80            /* T1 cont. cycle/pulse output */
#define T1CSRVAL    0xc6            /* enable interrupt, allow and */
                                    /*   and trigger countdown */

#define TIMER        0xfffb0000
#define RELOAD       0x24            /* clr IP & IUS,allow countdown */

#define CLOCK_VECTOR 66

uint32_t         Clock_isrs;        /* ISRs until next tick */

volatile uint32_t         Clock_driver_ticks; /* ticks since initialization */

rtems_isr_entry  Old_ticker;

void Clock_exit( void );

/*
 *  ISR Handler
 */
static rtems_isr Clock_isr(
  rtems_vector_number vector
)
{
  Clock_driver_ticks += 1;
  ((volatile struct z8036_map *) TIMER)->CT1_CMD_STATUS = RELOAD;

  if ( Clock_isrs == 1 ) {
    rtems_clock_tick();
    Clock_isrs = rtems_configuration_get_microseconds_per_tick() / 1000;
  }
  else
    Clock_isrs -= 1;
}

static void Install_clock(
  rtems_isr_entry clock_isr
)
{
  volatile struct z8036_map *timer;

  Clock_driver_ticks = 0;
  Clock_isrs = rtems_configuration_get_microseconds_per_tick() / 1000;

  Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
  timer = (struct z8036_map *) 0xfffb0000;
  timer->MASTER_INTR        = MICRVAL;
  timer->CT1_MODE_SPEC      = T1MSRVAL;

  *((uint16_t*)0xfffb0016) = MS_COUNT;  /* write countdown value */

  /*
   *  timer->CT1_TIME_CONST_MSB = (MS_COUNT >> 8);
   *  timer->CT1_TIME_CONST_LSB = (MS_COUNT &  0xff);
   */

  timer->MASTER_CFG         = MCCRVAL;
  timer->CT1_CMD_STATUS     = T1CSRVAL;

  /*
   * Enable interrupt via VME interrupt mask register
   */
  (*(uint8_t*)0xfffb0038) &= 0xfd;

  atexit( Clock_exit );
}

void Clock_exit( void )
{
  volatile struct z8036_map *timer;

  timer = (struct z8036_map *) 0xfffb0000;
  timer->MASTER_INTR        = 0x62;
  timer->CT1_MODE_SPEC      = 0x00;
  timer->MASTER_CFG         = 0xf4;
  timer->CT1_CMD_STATUS     = 0x00;
  /* do not restore old vector */
}

rtems_device_driver Clock_initialize(
  rtems_device_major_number major,
  rtems_device_minor_number minor,
  void *pargp
)
{
  Install_clock( Clock_isr );

  return RTEMS_SUCCESSFUL;
}