blob: 5597bd81cf0d4fdea7001045537f95d9124749f1 (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
|
/*
* SPARC Cache Manager Support
*/
/*
* CACHE MANAGER: The following functions are CPU-specific.
* They provide the basic implementation for the rtems_* cache
* management routines. If a given function has no meaning for the CPU,
* it does nothing by default.
*
* FIXME: Some functions simply have not been implemented.
*/
#include <stddef.h>
#define CPU_INSTRUCTION_CACHE_ALIGNMENT 0
#define CPU_CACHE_SUPPORT_PROVIDES_RANGE_FUNCTIONS
static inline void _CPU_cache_invalidate_entire_instruction ( void )
{
__asm__ volatile ("flush");
}
static inline void _CPU_cache_invalidate_instruction_range(
const void *i_addr,
size_t n_bytes
)
{
__asm__ volatile ("flush");
}
/* XXX these need to be addressed */
static inline void _CPU_cache_freeze_instruction ( void )
{
}
static inline void _CPU_cache_unfreeze_instruction ( void )
{
}
static inline void _CPU_cache_enable_instruction ( void )
{
}
static inline void _CPU_cache_disable_instruction ( void )
{
}
#include "../../../shared/cache/cacheimpl.h"
|
