blob: 750408d009a4c6c1c5f4f6d686ef9c82eba20c56 (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
|
/*
* @file
* @ingroup m68k_mvme162
* @brief Implementations for interrupt mechanisms for Time Test 27
*/
/*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifndef _RTEMS_TMTEST27
#error "This is an RTEMS internal file you must not include directly."
#endif
#ifndef __tm27_h
#define __tm27_h
/*
* Define the interrupt mechanism for Time Test 27
*
* NOTE: We use software interrupt 0
*/
#define MUST_WAIT_FOR_INTERRUPT 0
#define Install_tm27_vector( handler ) \
set_vector( (handler), VBR1 * 0x10 + 0x8, 1 ); \
lcsr->intr_level[2] |= 3; \
lcsr->intr_ena |= 0x100;
#define Cause_tm27_intr() lcsr->intr_soft_set |= 0x100
#define Clear_tm27_intr() lcsr->intr_clear |= 0x100
#define Lower_tm27_intr() /* empty */
#endif
|
