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|
/*===============================================================*\
| Project: RTEMS generic mcf548x BSP |
+-----------------------------------------------------------------+
| File: linkcmds.COBRA5475 |
+-----------------------------------------------------------------+
| The file contains the linker directives for the generic MCF548x |
| BSP to be used with an COBRA5475 board to load and execute |
| code in the RAM. |
+-----------------------------------------------------------------+
| Copyright (c) 2007 |
| Embedded Brains GmbH |
| Obere Lagerstr. 30 |
| D-82178 Puchheim |
| Germany |
| rtems@embedded-brains.de |
+-----------------------------------------------------------------+
| |
| Parts of the code has been derived from the "dBUG source code" |
| package Freescale is providing for M548X EVBs. The usage of |
| the modified or unmodified code and it's integration into the |
| generic mcf548x BSP has been done according to the Freescale |
| license terms. |
| |
| The Freescale license terms can be reviewed in the file |
| |
| Freescale_license.txt |
| |
+-----------------------------------------------------------------+
| |
| The generic mcf548x BSP has been developed on the basic |
| structures and modules of the av5282 BSP. |
| |
+-----------------------------------------------------------------+
| |
| The license and distribution terms for this file may be |
| found in the file LICENSE in this distribution or at |
| |
| http://www.rtems.org/license/LICENSE. |
| |
+-----------------------------------------------------------------+
| |
| date history ID |
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
| 12.11.07 1.0 ras |
| 15.10.09 1.1, adapted to COBRA5475 doe |
| |
\*===============================================================*/
/*
* Location and size of on-chip devices
*/
_SdramBase = DEFINED(_SdramBase) ? _SdramBase : 0xf0000000;
_SdramSize = DEFINED(_SdramSize) ? _SdramSize : (128 * 1024*1024);
_SysSramBase = DEFINED(_SysSramBase) ? _SysSramBase : __MBAR + 0x00010000;
_SysSramSize = DEFINED(_SysSramSize) ? _SysSramSize : (32 * 1024);
_McdapiBase = DEFINED(_McdapiBase) ? _McdapiBase : _SysSramBase;
_McdapiSize = DEFINED(_McdapiSize) ? _McdapiSize : (12 * 1024);
_CoreSramBase0 = DEFINED(_CoreSramBase0) ? _CoreSramBase0 : 0xFF000000;
_CoreSramBase1 = DEFINED(_CoreSramBase1) ? _CoreSramBase1 : 0xFF001000;
_CoreSramSize0 = DEFINED(_CoreSramSize0) ? _CoreSramSize0 : (4 * 1024);
_CoreSramSize1 = DEFINED(_CoreSramSize1) ? _CoreSramSize1 : (4 * 1024);
_BootFlashBase = DEFINED(_BootFlashBase) ? _BootFlashBase : 0xFC000000;
_BootFlashSize = DEFINED(_BootFlashSize) ? _BootFlashSize : (32 * 1024*1024);
_VBR = DEFINED(_VBR) ? _VBR : _SdramBase;
__MBAR = DEFINED(__MBAR) ? __MBAR : 0xFE000000;
MEMORY
{
sdram : ORIGIN = 0xF0000000, LENGTH = 128M
boot_flash : ORIGIN = 0xFC000000, LENGTH = 32M
}
REGION_ALIAS ("REGION_TEXT", sdram);
REGION_ALIAS ("REGION_TEXT_LOAD", sdram);
REGION_ALIAS ("REGION_DATA", sdram);
REGION_ALIAS ("REGION_DATA_LOAD", sdram);
INCLUDE linkcmds.base
|