| Commit message (Collapse) | Author | Age | Files | Lines |
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This moves the AArch64 MMU memory type definitions into cpukit for use
by libdebugger since remapping of memory is required to insert software
breakpoints.
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The spconfig01 and spmisc01 tests were disabled for all AArch64 BSPs due
to a toolchain issue preventing them from compiling correctly. The
binutils version that contains the fix has been released and integrated
into RSB such that these two tests now build and operate correctly.
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This reworks the existing MicroBlaze architecture port and BSP to
achieve basic functionality using the latest RTEMS APIs.
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This adds SMP support for AArch64 in cpukit and for the ZynqMP BSPs.
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ARM's GICv2 is configurable and its attributes vary between
implementations including omission of specific interrupts. This allows
BSPs to accomodate those varying implementations with customized
attribute sets.
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Close #4504.
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Added I2C drivers for ZynqMP and updated build system accordingly.
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Certain files related to the Zynq BSP's I2C driver are useable by the ZynqMP BSP as well.
Moved these files to shared directory in anticipation of I2C support for ZynqMP.
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Prefix the BSP family name with "bsps/" to make it distinct to the BSP
variant names.
Update #4468.
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Add rtems_interrupt_entry_remove(). Split up irq-generic.c into several files.
In particular, place all functions which use dynamic memory into their own
file.
Add optional macros to let the BSP customize the vector installation after
installing the first entry and the vector removal before removing the last
entry:
* bsp_interrupt_vector_install()
* bsp_interrupt_vector_remove()
Use these new customization options in the m68k/genmcf548x BSP so re-use the
generic interrupt controller support.
Update #3269.
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Add rtems_interrupt_raise_on() and rtems_interrupt_clear().
Add a default implementation which just returns RTEMS_UNSATISFIED for
valid parameters.
Update #3269.
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Add rtems_interrupt_vector_disable().
Update #3269.
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Update #3269.
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Update #3269.
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When compiling the lwIP port for the TMS570, there
were issues with the BSP. Headers are expected in a folder
named ti_herc which did not exist. This fixes the issue.
Furthermore, there were multiple warnings about define redefinitions.
This was fixed as well.
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These patches were submitted a few months ago, but it was found out
that the default-by-family: [] were missing in the GPIO .yml lines.
This was fixed in this patch.
This patch accounts for different pins for the ETH peripheral
on STM32H7 devices. For example, the Nucleo H743ZI has slightly
different pins than other STM32H7 boards.
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Update #4468.
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- Optionally add support for 'default-by-family' to allow
option to be set by a family and so all related BSPs
Close #4468
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Calling the memory FLASH and EXTRAM instead of FLEXSPI and SDRAM makes
it simpler to support other types of external RAM. This patch also
removes some of the calculations and improves names and documentation to
avoid pitfalls. It removes a unnecessary memory definition.
Update #4180
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Update #4180
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This reverts commit 10041a4cfc00d5f6876d3d6cfc30c23347b4cf42.
This type of configuration does not belong in RTEMS and is better
constrained to libbsd where the defines are actually being used.
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Provide the options necessary to enable any combination of CGEM ethernet
interfaces in LibBSD. The default is still CGEM3, so this should
continue to operate as expected on typical Zynq Ultrascale+ MPSoC
development hardware.
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Statically initialize the trap table in start.S to jump to _SPARC_Bad_trap()
for all unexpected traps. This enables a proper RTEMS fatal error handling
right from the start. Do not rely on the stack and register settings which
caused an unexpected trap. Use the ISR stack of the processor to do the fatal
error handling. Save the full context which caused the trap. Fatal error
handler may use it for error logging.
Unify the _CPU_Exception_frame_print() implementations and move it to cpukit.
Update #4459.
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Update #3269.
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The a72 BSPs are identical to the a53 BSPs just changing a53 to a72.
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Update #4202.
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Add the BSPs for running on the ZU3EG Ultrascale+ Zynq MPSoC and alter
the option defaults necessary for them to run properly using the
standard BOOT.BIN configured for PetaLinux that comes in the Out-of-Box
package.
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Currently, the AArch64 BSPs have a hard time running on real hardware
without building the toolchain and the bsps with -mstrict-align in
multiple places. Configuring the MMU on these chips allows for unaligned
memory accesses for non-device memory which avoids requiring strict
alignment in the toolchain and in the BSPs themselves.
In writing this driver, it was found that the synchronous exception
handling code needed to be rewritten since it relied on clearing SCTLR_EL1 to
avoid thread stack misalignments in RTEMS_DEBUG mode. This is now
avoided by exactly preserving thread mode stack and flags and the new
implementation is compatible with the draft information provided on the
mailing list covering the Exception Management API.
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The default available RAM on the A53 BSP is quite small at 8MB. This
bumps that to 128MB to avoid allocation failures in tmcontext01 caused
by large allocations on a cache size of 16MB reported by the system
registers in QEMU.
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The sizes are configurable via fuses or per software via some registers.
At the moment the registers are not changed. Changing the registers
destroys data stored in the RAM areas (like application code or data).
So either the fuses or some bootloader should be used to set them before
the application starts.
This also adds an OCRAM only linker command file.
Update #4180
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Update #3866.
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The "powerpc/shared/console" code has the start-up console value fixed
at 9600 baud. This changes the hard-wired constant "9600" in the code
to the configuration setting "BSP_CONSOLE_BAUD" and adds configuration
support in both the "waf" and the legacy configuration systems.
Note that the VME BSPs beatnik, mvme3100, and mve5100 can be improved
by adding a "mvmexxxx" BSP family. This configuration change, as well
as future configuration changes, could then be made in a "grp.yml" file.
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Now using default pins
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The links are already in spec/build/bsps/arm/stm32h7/grp.yml.
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Update #3850
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Update #3850
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Update #3850
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