| Commit message (Collapse) | Author | Age | Files | Lines |
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Provide the options necessary to enable any combination of CGEM ethernet
interfaces in LibBSD. The default is still CGEM3, so this should
continue to operate as expected on typical Zynq Ultrascale+ MPSoC
development hardware.
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Statically initialize the trap table in start.S to jump to _SPARC_Bad_trap()
for all unexpected traps. This enables a proper RTEMS fatal error handling
right from the start. Do not rely on the stack and register settings which
caused an unexpected trap. Use the ISR stack of the processor to do the fatal
error handling. Save the full context which caused the trap. Fatal error
handler may use it for error logging.
Unify the _CPU_Exception_frame_print() implementations and move it to cpukit.
Update #4459.
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Update #3269.
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The a72 BSPs are identical to the a53 BSPs just changing a53 to a72.
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Update #4202.
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Add the BSPs for running on the ZU3EG Ultrascale+ Zynq MPSoC and alter
the option defaults necessary for them to run properly using the
standard BOOT.BIN configured for PetaLinux that comes in the Out-of-Box
package.
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Currently, the AArch64 BSPs have a hard time running on real hardware
without building the toolchain and the bsps with -mstrict-align in
multiple places. Configuring the MMU on these chips allows for unaligned
memory accesses for non-device memory which avoids requiring strict
alignment in the toolchain and in the BSPs themselves.
In writing this driver, it was found that the synchronous exception
handling code needed to be rewritten since it relied on clearing SCTLR_EL1 to
avoid thread stack misalignments in RTEMS_DEBUG mode. This is now
avoided by exactly preserving thread mode stack and flags and the new
implementation is compatible with the draft information provided on the
mailing list covering the Exception Management API.
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The default available RAM on the A53 BSP is quite small at 8MB. This
bumps that to 128MB to avoid allocation failures in tmcontext01 caused
by large allocations on a cache size of 16MB reported by the system
registers in QEMU.
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The sizes are configurable via fuses or per software via some registers.
At the moment the registers are not changed. Changing the registers
destroys data stored in the RAM areas (like application code or data).
So either the fuses or some bootloader should be used to set them before
the application starts.
This also adds an OCRAM only linker command file.
Update #4180
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Update #3866.
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The "powerpc/shared/console" code has the start-up console value fixed
at 9600 baud. This changes the hard-wired constant "9600" in the code
to the configuration setting "BSP_CONSOLE_BAUD" and adds configuration
support in both the "waf" and the legacy configuration systems.
Note that the VME BSPs beatnik, mvme3100, and mve5100 can be improved
by adding a "mvmexxxx" BSP family. This configuration change, as well
as future configuration changes, could then be made in a "grp.yml" file.
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Now using default pins
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The links are already in spec/build/bsps/arm/stm32h7/grp.yml.
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Update #3850
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Update #3850
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Update #3850
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Update #4372
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Updates #4321
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The following files have been ported
1) ti_pinmux.c
2) ti_pinmux.h
3) am335x_scm_padconf.c
4) am335x_scm_padconf.h
Update #3784
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Detects the SOC type using FDT and also replaces the ti_cpuid.h
header in FreeBSD with custom one.
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Moves drvmgr_drivers[] from amba.c to a separate file in order
to avoid the dependecy on APBUART/GPTIMER drivers. This has
an effect when user configured not to use timer or uart
in their project.
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Close #4324.
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Update #4324.
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Reimplemented the baud-rate algorithm from scratch to cope with
GRCAN, GRCANFD and OC_CAN devices.
Update #4323.
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Updates #4320
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This enables several testsuites that were initially disabled during
development.
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The current ZynqMP BSPs don't have _qemu in their name as do all other
RTEMS BSPs that are specifically made to run on QEMU. This fixes the
naming for those ZynqMP BSP variants for easier identification.
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AArch64 on hardware is often started at EL2 instead of EL1 from either
u-boot or a first stage bootloader. This allows RTEMS to drop from EL2
execution to EL1 to operate as normal.
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Remove usage of SUBALIGN() in aarch64 linkcmds which works around a
difference in behavior on AArch64 platforms. This is no longer necessary
since alignment is now enforced explicitly.
Closes #4178.
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Closes #4179.
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Update #4267.
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Update #4267.
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Use the Python sorted() function to sort the "source" lists.
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Update #4244.
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- Add support to the BSP to enable irq-generic management
- Update the powerpc shared irq code to support irq-generic. This
is an opt in option for existing powerpc bsps. This change
should be simpler now
- Fix a number of issues in ISA IRQ controller handling by porting
fixes from the i386 (PC) BSP
Closes #4238
Closes #4239
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