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* spec: Add QEMU test annotationsKinsey Moore2023-07-102-0/+4
| | | | | | | | | QEMU is known to fail certain tests intermittently due to clock tick delivery issues. This defines those tests as intermittent for BSPs intended to run on QEMU alone. Updates #4922 Updates #4072
* bsps/stm32h7: disable MPU alignment for M4-based BSP variantsKarel Gardas2023-06-291-0/+4
| | | | | | There is no point in wasting precious memory space on enforced section alignment for the purpose of MPU which is not implemented on M4 core anyway.
* build: Remove superfluous attributesSebastian Huber2023-06-283-9/+0
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* build: Remove unused fileSebastian Huber2023-06-161-6/+0
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* Update company nameSebastian Huber2023-06-128-8/+8
| | | | | The embedded brains GmbH & Co. KG is the legal successor of embedded brains GmbH.
* bsps/imxrt: Make the OCRAM address configurableChristian Mauderer2023-05-223-2/+21
| | | | | Depending on the chip variant, the OCRAM can have different addresses. Make it configurable.
* bsps/imxrt: Move board specific filesChristian Mauderer2023-05-222-10/+16
| | | | | Move the files that are board specific and not specific to the chip family into a separate folder.
* bsps/imxrt: Adapt to new mcux-sdk versionChristian Mauderer2023-05-225-270/+268
| | | | | Remove the old NXP MCUXpresso SDK and adapt the BSP so that it uses the new mcux-sdk.
* bsp/imxrt: Update support library from mcux-sdkChristian Mauderer2023-05-223-0/+769
| | | | | | | | | | | | | | | | | | | This imports new files from the mcux-sdk support library. NXP now offers the library as a git repository instead of a zip package. The git repository supports multiple CPUs from the i.MXRT family: https://github.com/nxp-mcuxpresso/mcux-sdk.git The imported files are from revision 2b9354539e6e4f722749e87b0bdc22966dc080d9 This revision is the same as MCUXpresso 2.13.0 with small bug fixes. For importing the files, a script has been used, that parses the mcux-sdk cmake files and creates the yaml files for RTEMS: https://raw.githubusercontent.com/c-mauderer/nxp-mcux-sdk/d21c3e61eb8602b2cf8f45fed0afa50c6aee932f/export_to_RTEMS.py
* Update company nameSebastian Huber2023-05-20437-437/+437
| | | | | The embedded brains GmbH & Co. KG is the legal successor of embedded brains GmbH.
* spec: add MPU CTRL option to be usable on ARMV7M based BSPsKarel Gardas2023-03-163-0/+21
| | | | | | The patch also enables usage of the option on imxrt and stm32h7 based BSPs. Sponsored-By: Precidata
* bsps/stm32h7: fix compilation failure of stm32h757i-eval-m4 BSPKarel Gardas2023-02-121-1/+4
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* bsps/stm32h7: allow config and usage of QSPI memory on stm32h757i-eval BSPKarel Gardas2023-02-052-1/+9
| | | | | | | | | The QSPI memory is initialized and used only when the BSP configure file sets QSPI memory size to non-zero value. Currently QSPI is run in memory mapped mode which allows future RTEMS binary linkage and upload into QSPI memory. Sponsored-By: Precidata
* build: Use enabled by for defaultsSebastian Huber2023-01-17320-1065/+1217
| | | | | | | | | | | | | | Merge the "default" and "default-by-variant" attributes. Use an "enabled-by" expression to select the default value based on the enabled set. This makes it possible to select default values depending on other options. For example you could choose memory settings based on whether RTEMS_SMP is enabled or disabled. The change was tested by comparing the output of ./waf bspdefaults before and after the change.
* build: Replace variant patterns with a listSebastian Huber2023-01-1776-122/+203
| | | | | | | | | | | Replace the variant patterns in the default-by-variant list with an explicit list of matching BSPs. The change was tested by comparing the output of ./waf bspdefaults before and after the change.
* build: Format build itemsSebastian Huber2023-01-17106-447/+448
| | | | | Use yaml.dump(data, default_flow_style=False, allow_unicode=True) with a custom representer for integer default values to format all build items.
* build: Add reason to test state definitionsSebastian Huber2023-01-1719-321/+378
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* bsp/atsam: Allow to use custom SDRAMChristian Mauderer2022-12-151-5/+16
| | | | | | | | | | | With the old build system in RTEMS 5 that was possible by just overwriting BOARD_Sdram_Config and setting a custom ATSAM_MEMORY_SDRAM_SIZE during building the BSP. In the new build system that ATSAM_MEMORY_SDRAM_SIZE is set exclusively by the selected SDRAM chip. This patch adds the possibility to specify a "custom-0x100000" or similar as SDRAM type where the number gives the SDRAM size.
* bsps/atsam: Add NULL pointer protectionChristian Mauderer2022-12-154-2/+27
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* spec/beagle: Add missing spi.h installKinsey Moore2022-11-281-0/+1
| | | | | | The beagle SPI functions are unusable by applications unless this file is installed with the BSP. This ensures that the file is installed properly.
* bsps/arm/beagle/dcan: Added DCAN supportPrashanth S2022-10-301-0/+2
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* bsp/tms570: Fix TMS570_USE_HWINIT_STARTUPSebastian Huber2022-09-203-3/+19
| | | | Make sure only one module is built which defines bsp_start_hook_0().
* bsp/tms570: Add -mbe32 to LINKFLAGSSebastian Huber2022-09-202-0/+19
| | | | | | | | | | | | | | | | There is not just big-endian on ARM. We have two variants BE32 (obsolete) and BE8. The Cortex-R5F processor supports only BE8, however, some TMS570 variants are BE32 internally. In GCC 8 and later, the --be8 option is passed to the linker based on the selected architecture or CPU. Use BE32 by default for the TMS570 BSP. In GCC, see: commit 63d03dcecdafe34715282a5155cfc2162375feca Author: Richard Earnshaw <rearnsha@arm.com> Date: Mon Jul 3 13:22:05 2017 +0000 [arm] Clean up generation of BE8 format images.
* spec/bsps: Do not install tm27.hChris Johns2022-08-2224-24/+0
| | | | Updates #4705
* irq/arm-gicv3.h: Customize CPU Interface initSebastian Huber2022-07-123-2/+2
| | | | | | | Use the existing WRITE_SR() abstraction to access the interrupt group 0 and 1 enable registers. This fixes the build for the AArch32 target. Add BSP options which define the initial values of CPU Interface registers.
* build: Fix optimization flags definition orderSebastian Huber2022-07-0447-94/+94
| | | | | | OPTIMIZATION_FLAGS must be defined before /build/bsp/bspopts is processed. Update #4670.
* build: Add cppflags, cflags, cxxflags to groupsSebastian Huber2022-07-0414-0/+42
| | | | | | | Propagate the group defined cppflags, cflags, and cxxflags from parent groups to child items through the build item context. Update #4670.
* bsp/stm32h7: Exclude some testsSebastian Huber2022-06-241-0/+2
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* bsp/rtl22xx: Exclude exit03Sebastian Huber2022-06-241-0/+1
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* bsps/atsam: Fix type of options (part 2)Christian Mauderer2022-06-142-2/+4
| | | | | | | The patch "bsps/atsam: Fix type of options" missed to adapt some parts of the yml. With that a custom value works well. But if no value is set, configure doesn't fall back to the default value but instead just causes an error. This patch fixes that.
* bsps/stm32h7: remove external memory initialization from nucleo-h743zi BSPKarel Gardas2022-06-101-1/+0
| | | | | | | Nucleo board does not provide any external memory so code does not have any function here anyway. Sponsored-By: Precidata
* bsps/stm32h7: move BSP start hooks into boards subdirectoriesKarel Gardas2022-06-107-0/+7
| | | | | | | The idea here is to prepare for better per-board specialization of the hooks function code. Sponsored-By: Precidata
* bsps/arm: fix installation of core_cm4.hKarel Gardas2022-06-101-0/+1
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* bsps/imx: Enable clock of ETH2Christian Mauderer2022-06-091-0/+1
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* bsps/atsam: Fix type of optionsChristian Mauderer2022-06-072-4/+4
| | | | | | ATSAM_CONSOLE_DEVICE_INDEX and ATSAM_CONSOLE_DEVICE_TYPE have to be integers like suggested by their description. Otherwise it's not possible to select (for example) USART2 as console device.
* bsps/stm32h7: set SDRAM 1 size to 0 by default on nucleo-h743zi BSPKarel Gardas2022-06-021-0/+1
| | | | | | | Nucleo does not have any SDRAM, so 0 size is the only possible right choice here. Sponsored-By: Precidata
* bsps/stm32h7: set default linkage to flash for nucleo-h743zi BSPKarel Gardas2022-06-021-0/+1
| | | | | | | Nucleo does not have any SDRAM so default linkage to SDRAM does not make any sense here. Sponsored-By: Precidata
* bsps/stm32h7: set default printk instance on nucleo-h743zi BSP to USART3Karel Gardas2022-06-021-1/+4
| | | | | | | | This is the default configuration of the board out of the box. Any other possible/supported configuration requires soldering, so definitely not out of the box experience. Sponsored-By: Precidata
* bsps/stm32h7: add stm32h747i-disco-m4 BSP variantKarel Gardas2022-06-0220-0/+43
| | | | | | | | | This patch adds stm32h747i-disco-m4 BSP variant and puts it in sync with the stm32h747i-disco BSP variant hardware support. That means, only USART 1, 2 and UART 8 are enabled. Also SDRAM 2 is set to 32MB, SDRAM 1 size is set to 0. Sponsored-By: Precidata
* bsps/stm32h7: set default SDRAM x sizes on stm32h747i-disco BSPKarel Gardas2022-06-012-0/+2
| | | | | | | | | This means: SDRAM 1: 0 SDRAM 2: 32 MB Sponsored-By: Precidata
* bsps/stm32h7: disable all unsupported U(S)ARTs on stm32h747i-disco BSPKarel Gardas2022-06-017-0/+7
| | | | | | | | This patch disables all U(S)ARTs which are not supported by the board itself and its provided connectors. That means only USART1 and 2 and UART8 are enabled. Sponsored-By: Precidata
* bsps/stm32h7: add configuration and enable build of stm32h747i-disco BSPKarel Gardas2022-06-018-0/+33
| | | | Sponsored-By: Precidata
* bsps/stm32h7: set default SDRAM x sizes on stm32h757i-eval-m4 BSPKarel Gardas2022-06-012-0/+2
| | | | | | | | | This means: SDRAM 1: 0 SDRAM 2: 32 MB Sponsored-By: Precidata
* bsps/stm32h7: disable all U(S)ARTs except USART1 on stm32h757i-eval-m4 BSPKarel Gardas2022-06-019-0/+9
| | | | | | | This patch disables all U(S)ARTs which are not supported by the board itself and its provided connectors. Sponsored-By: Precidata
* bsps/stm32h7: add configuration and enable build of stm32h757i-eval-m4 BSPKarel Gardas2022-06-0111-3/+66
| | | | | | | | | | | | | | | | This is minimalist configuration for the stm32h757i-eval-m4 BSP provided here. The only general enhancement worth mention is a flash origin address configuration which is needed for simplification as M4 core boots from second flash bank which starts at 0x8100000 by default. The boot address of the core may be changed by using STM32CubeProgrammer. If done so then also BSP configuration needs to be changed accordingly. As the BSP variant is running on M4 core, there is also more configuration changes required here. E.g. boot core and ABI (compilation flags) in comparison with stm32h757i-eval BSP. On the other hand, C code is shared completely with this BSP variant. Sponsored-By: Precidata
* bsps/stm32h7: move cache implementation from obj to BSPs own yml fileKarel Gardas2022-06-015-1/+4
| | | | | | | This is done in preparation for future Cortex-M4 based BSP variants which do not provide cache at all. Sponsored-By: Precidata
* bsps/stm32h7: set default SDRAM x sizes on stm32h757i-eval BSPKarel Gardas2022-05-272-1/+5
| | | | | | | | | This means: SDRAM 1: 0 SDRAM 2: 32 MB Sponsored-By: Precidata
* bsps/stm32h7: provide linkcmds for SRAM, FLASH_SDRAM and SRAM_SDRAM linkingKarel Gardas2022-05-275-2/+156
| | | | Sponsored-By: Precidata
* bsps/stm32h7: add and enable test set exclusion for stm32h757i-eval BSPKarel Gardas2022-05-272-0/+21
| | | | Sponsored-By: Precidata
* bsps/stm32h7: disable all U(S)ARTs except USART1 on stm32h757i-eval BSPKarel Gardas2022-05-279-2/+16
| | | | | | | This patch disables all U(S)ARTs which are not supported by the board itself and its provided connectors. Sponsored-By: Precidata
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