| Commit message (Collapse) | Author | Age | Files | Lines |
|
|
|
|
|
|
|
|
| |
When compiling the lwIP port for the TMS570, there
were issues with the BSP. Headers are expected in a folder
named ti_herc which did not exist. This fixes the issue.
Furthermore, there were multiple warnings about define redefinitions.
This was fixed as well.
|
|
|
|
|
|
|
|
|
|
| |
These patches were submitted a few months ago, but it was found out
that the default-by-family: [] were missing in the GPIO .yml lines.
This was fixed in this patch.
This patch accounts for different pins for the ETH peripheral
on STM32H7 devices. For example, the Nucleo H743ZI has slightly
different pins than other STM32H7 boards.
|
|
|
|
| |
Update #4468.
|
|
|
|
|
|
|
| |
- Optionally add support for 'default-by-family' to allow
option to be set by a family and so all related BSPs
Close #4468
|
|
|
|
|
|
|
|
|
| |
Calling the memory FLASH and EXTRAM instead of FLEXSPI and SDRAM makes
it simpler to support other types of external RAM. This patch also
removes some of the calculations and improves names and documentation to
avoid pitfalls. It removes a unnecessary memory definition.
Update #4180
|
|
|
|
| |
Update #4180
|
|
|
|
| |
Update #4202.
|
|
|
|
|
|
|
|
|
|
|
|
| |
The sizes are configurable via fuses or per software via some registers.
At the moment the registers are not changed. Changing the registers
destroys data stored in the RAM areas (like application code or data).
So either the fuses or some bootloader should be used to set them before
the application starts.
This also adds an OCRAM only linker command file.
Update #4180
|
|
|
|
| |
Now using default pins
|
| |
|
|
|
|
| |
The links are already in spec/build/bsps/arm/stm32h7/grp.yml.
|
|
|
|
| |
Update #3850
|
| |
|
| |
|
| |
|
| |
|
|
|
|
| |
Update #4372
|
|
|
|
| |
Updates #4321
|
|
|
|
|
| |
Detects the SOC type using FDT and also replaces the ti_cpuid.h
header in FreeBSD with custom one.
|
| |
|
|
|
|
| |
Updates #4320
|
| |
|
|
|
|
|
|
| |
AArch64 on hardware is often started at EL2 instead of EL1 from either
u-boot or a first stage bootloader. This allows RTEMS to drop from EL2
execution to EL1 to operate as normal.
|
| |
|
|
|
|
| |
Update #4267.
|
|
|
|
| |
Use the Python sorted() function to sort the "source" lists.
|
| |
|
|
|
|
|
| |
Move the Freescale EDMA driver to it's own object and build it only for
the BSP that is currently using it.
|
|
|
|
|
|
|
|
| |
This allows an application to get the registers of the LPSPI. That is
usefull for applications that want to use DMA for a very specialized and
highly optimized communication.
Update #4180
|
|
|
|
|
|
|
|
|
|
| |
Note: The changes have been done with portability in mind. The driver
should (in theory) be able to replace the original one in the MPC BSPs
too. For full compatibility an adaption layer and especially a test
would be necessary. Because both are missing, don't integrate it into
the MPC BSP now.
Update #4180
|
|
|
|
|
|
|
| |
This allows applications to individually provide configuration
structures.
Update #4209.
|
|
|
|
|
|
|
| |
This allows applications to individually provide configuration
structures.
Update #4209.
|
|
|
|
|
|
|
|
| |
This BSP supports the Arm Fixed Virtual Platform. Only the Cortex-R52
processor configuration is supported by the BSP. It should be easy to
add support for other variants if needed.
Update #4202.
|
|
|
|
|
|
| |
This avoids a function call overhead in the interrupt dispatching.
Update #4202.
|
|
|
|
|
|
|
|
|
|
| |
Set the VBAR to the vector table in the start section before
bsp_start_hook_0() is called to earlier handle exceptions in RTEMS.
Set the VBAR to the normal vector table in start.S for the main
processor. Secondary processors set it in bsp_start_hook_0().
Update #4202.
|
|
|
|
|
|
|
| |
When moving the headers from the imx BSP to the shared area, the wrong
directory has been selected. This patch fixes that problem.
Update #4180
|
|
|
|
|
|
| |
This allows simpler creation of own dts files for custom boards.
Update #4180
|
| |
|
|
|
|
|
|
|
| |
- Disabled by default
- Enable using ARM_MMU_USE_SMALL_PAGES option
Close 4192.
|
|
|
|
|
|
| |
Clarify documentation.
Update #4202.
|
|
|
|
| |
Update #4202.
|
|
|
|
| |
Update #4202.
|
|
|
|
|
|
|
| |
Currently, zynq-uart code is always built and has some requirements for
BSPs that use it. Instead of making all BSPs satisfy that requirement or
working around it by setting defaults, this moves the zynq-uart code
into its own spec build object so it can be included if needed.
|
|
|
|
|
|
|
|
| |
This adds a BSP family that runs on the Xilinx Ultrascale+ MPSOC
(ZynqMP) family of chips. It is configured to be usable on the Qemu
ZCU102 machine definition and should be almost trivially portable to
ZynqMP development boards and custom hardware. It is also configured to
be usable with libbsd.
|
|
|
|
|
| |
This moves the ARM GICv2 driver to bsps/shared to be usable by AArch64
code.
|
|
|
|
|
| |
This moves the zynq-uart driver from bsps/arm/shared to bsps/shared to
accomodate use by AArch64 BSPs.
|
|
|
|
| |
Update #4180
|
|
|
|
|
|
|
| |
Modify the MPU functions of the stm32h7 BSP to be table based and
available for all ARMV7M BSPs.
Update #4180
|
|
|
|
| |
Update #4180
|
|
|
|
| |
Update #4180
|