rtems - RTEMS Kernel, file-systems, drivers, BSPs, samples, and testsuite.

	Commit message (Collapse)	Author	Age	Files	Lines
*	cpukit: Add AArch64 SMP Support	Kinsey Moore	2021-09-21	1	-0/+2
\| \| \| \|	This adds SMP support for AArch64 in cpukit and for the ZynqMP BSPs.
*	bsps/zynqmp: Added I2C support for ZynqMP	Stephen Clark	2021-09-09	1	-0/+4
\| \| \| \|	Added I2C drivers for ZynqMP and updated build system accordingly.
*	Revert "bsps/zynqmp: Allow any or all CGEMs to be enabled"	Kinsey Moore	2021-07-01	1	-8/+0
\| \| \| \| \| \| \|	This reverts commit 10041a4cfc00d5f6876d3d6cfc30c23347b4cf42. This type of configuration does not belong in RTEMS and is better constrained to libbsd where the defines are actually being used.
*	bsps/zynqmp: Allow any or all CGEMs to be enabled	Kinsey Moore	2021-06-28	1	-0/+8
\| \| \| \| \| \| \|	Provide the options necessary to enable any combination of CGEM ethernet interfaces in LibBSD. The default is still CGEM3, so this should continue to operate as expected on typical Zynq Ultrascale+ MPSoC development hardware.
*	bsps/aarch64: add non-secure mode and versal support	Gedare Bloom	2021-06-24	1	-0/+2
\|
*	bsps/aarch64: Add MMU driver to relax alignment	Kinsey Moore	2021-05-27	1	-0/+2
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Currently, the AArch64 BSPs have a hard time running on real hardware without building the toolchain and the bsps with -mstrict-align in multiple places. Configuring the MMU on these chips allows for unaligned memory accesses for non-device memory which avoids requiring strict alignment in the toolchain and in the BSPs themselves. In writing this driver, it was found that the synchronous exception handling code needed to be rewritten since it relied on clearing SCTLR_EL1 to avoid thread stack misalignments in RTEMS_DEBUG mode. This is now avoided by exactly preserving thread mode stack and flags and the new implementation is compatible with the draft information provided on the mailing list covering the Exception Management API.
*	bsps/shared: Add Xilinx-AXI SPI driver to waf	Jan Sommer	2021-03-30	1	-0/+2
\| \| \| \|	Updates #4321
*	bsps/xilinx_zynq: Add SPI driver to waf	Jan Sommer	2021-03-10	1	-0/+2
\| \| \| \|	Updates #4320
*	spec: Move zynq-uart into its own object	Kinsey Moore	2020-12-04	1	-0/+2
\| \| \| \| \| \| \|	Currently, zynq-uart code is always built and has some requirements for BSPs that use it. Instead of making all BSPs satisfy that requirement or working around it by setting defaults, this moves the zynq-uart code into its own spec build object so it can be included if needed.
*	Add AArch64 ZynpMP BSP	Kinsey Moore	2020-12-04	1	-0/+44
	This adds a BSP family that runs on the Xilinx Ultrascale+ MPSOC (ZynqMP) family of chips. It is configured to be usable on the Qemu ZCU102 machine definition and should be almost trivially portable to ZynqMP development boards and custom hardware. It is also configured to be usable with libbsd.