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2022-08-22spec/bsps: Do not install tm27.hChris Johns1-1/+0
Updates #4705
2022-07-12irq/arm-gicv3.h: Customize CPU Interface initSebastian Huber1-1/+0
Use the existing WRITE_SR() abstraction to access the interrupt group 0 and 1 enable registers. This fixes the build for the AArch32 target. Add BSP options which define the initial values of CPU Interface registers.
2021-11-30build: Use common objects item for get memorySebastian Huber1-1/+0
2021-11-01aarch64: Break out MMU definitionsKinsey Moore1-0/+1
This moves the AArch64 MMU memory type definitions into cpukit for use by libdebugger since remapping of memory is required to insert software breakpoints.
2021-06-09aarch64: add qemu bsps for cortex-a72Gedare Bloom1-6/+6
The a72 BSPs are identical to the a53 BSPs just changing a53 to a72.
2021-02-26bsps: Add default rtems_get_target_hash()Sebastian Huber1-0/+1
Update #4267.
2021-02-24build: Sort source listsSebastian Huber1-6/+6
Use the Python sorted() function to sort the "source" lists.
2020-12-23bsps: Use header file for GIC architecture supportSebastian Huber1-1/+0
This avoids a function call overhead in the interrupt dispatching. Update #4202.
2020-12-02bsps: Move ARM GICv2 driver to bsps/sharedKinsey Moore1-1/+1
This moves the ARM GICv2 driver to bsps/shared to be usable by AArch64 code.
2020-10-05bsps: Add Cortex-A53 LP64 basic BSPKinsey Moore1-0/+37
This adds an AArch64 basic BSP based on Qemu's Cortex-A53 emulation with interrupt support using GICv3 and clock support using the ARM GPT.