| Commit message (Collapse) | Author | Age | Files | Lines |
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The default available RAM on the A53 BSP is quite small at 8MB. This
bumps that to 128MB to avoid allocation failures in tmcontext01 caused
by large allocations on a cache size of 16MB reported by the system
registers in QEMU.
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This enables several testsuites that were initially disabled during
development.
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Remove usage of SUBALIGN() in aarch64 linkcmds which works around a
difference in behavior on AArch64 platforms. This is no longer necessary
since alignment is now enforced explicitly.
Closes #4178.
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Closes #4179.
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Update #4267.
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Use the Python sorted() function to sort the "source" lists.
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This avoids a function call overhead in the interrupt dispatching.
Update #4202.
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This moves the ARM GICv2 driver to bsps/shared to be usable by AArch64
code.
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The spintrcritical03-05 and psx12 tests are known to fail on Qemu when
the host system is heavily loaded. A single run of Qemu per core
during a testsuite run tends to yield positive results, but any
additional load on a system will result in test failures.
This patch also applies the correct expected test state for intermittent
failures so that those tests will still build.
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The SUBALIGN(4) required on rtemsroset and rtemsrwset for ILP32 builds
was previously present on LP64 builds and causes no issues within RTEMS,
but causes relocation/alignment issues when building libbsd. This
restricts those alignment changes to ILP32 builds.
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This adds an AArch64 ILP32 BSP variant based on Qemu's Cortex-A53
emulation with interrupt support using GICv3 and clock support using
the ARM GPT.
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This adds an AArch64 basic BSP based on Qemu's Cortex-A53 emulation with
interrupt support using GICv3 and clock support using the ARM GPT.
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