| Commit message (Collapse) | Author | Age | Files | Lines |
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Update #2674.
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Use _Thread_Do_dispatch() instead of _Thread_Dispatch(). Restore the
PSR[EF] state of the interrupted context via new system call
syscall_irqdis_fp in case floating-point support is enabled.
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Initialize the thread queue context with invalid data in debug
configurations to catch missing set up steps.
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Update #2811.
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Move thread state for _Thread_queue_Enqueue() to the thread queue
context. This reduces the parameter count of _Thread_queue_Enqueue()
from five to four (ARM for example has only four function parameter
registers). Since the thread state is used after several function calls
inside _Thread_queue_Enqueue() this parameter was saved on the stack
previously.
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Callers of _Thread_Do_dispatch() must have a valid
Per_CPU_Control::Stats::thread_dispatch_disabled_instant.
Call _Profiling_Outer_most_interrupt_entry_and_exit() with the interrupt
stack to not exceed Per_CPU_Control::Interrupt_frame.
Update #2751.
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Update #2674.
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Update #2825.
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Update #2825.
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Turn pthread_spinlock_t into a self-contained object. On uni-processor
configurations, interrupts are disabled in the lock/trylock operations
and the previous interrupt status is restored in the corresponding
unlock operations. On SMP configurations, a ticket lock is a acquired
and released in addition.
The self-contained pthread_spinlock_t object is defined by Newlib in
<sys/_pthreadtypes.h>.
typedef struct {
struct _Ticket_lock_Control _lock;
__uint32_t _interrupt_state;
} pthread_spinlock_t;
This implementation is simple and efficient. However, this test case of
the Linux Test Project would fail due to call of printf() and sleep()
during spin lock ownership:
https://github.com/linux-test-project/ltp/blob/master/testcases/open_posix_testsuite/conformance/interfaces/pthread_spin_lock/1-2.c
There is only limited support for profiling on SMP configurations.
Delete CORE spinlock implementation.
Update #2674.
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Delete unused _Thread_queue_Enqueue() and rename
_Thread_queue_Enqueue_critical() to _Thread_queue_Enqueue().
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Replace the expected thread dispatch disable level with a thread queue
enqueue callout. This enables the use of _Thread_Dispatch_direct() in
the thread queue enqueue procedure. This avoids impossible exection
paths, e.g. Per_CPU_Control::dispatch_necessary is always true.
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On SMP configurations, it is a fatal error to call blocking operating
system with interrupts disabled, since this prevents delivery of
inter-processor interrupts. This could lead to executing threads which
are not allowed to execute resulting in undefined behaviour.
The ARM Cortex-M port has a similar problem, since the interrupt state
is not a part of the thread context.
Update #2811.
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Use the right register to determine if a thread dispatch is allowed and
necessary.
Update #2751.
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This fixes the CPU ports with relaxed alignment restrictions, e.g. type
alignment is less than the type size.
Close #2822.
Close #2823.
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We cannot use the MRS or MSR instructions in Thumb-1 mode. Stay in ARM
mode for the Thumb-1 targets during interrupt low-level processing.
Update #2751.
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Close #2820.
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Update #2820.
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Close #2818.
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Close #2816.
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Close #2817.
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Avoid use of the stack for the hot paths.
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In contrast to _ISR_Get_level() the _ISR_Is_enabled() function evaluates
a level parameter and returns a boolean value.
Update #2811.
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Update #2811.
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Update #2751.
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Update #2751.
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Move profiling code closer to bsp_interrupt_disable() to allow re-use of
r9 later.
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Update #2751.
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Use a processor-specific interrupt frame during context switches in case
the executing thread is longer executes on the processor and the heir
thread is about to start execution. During this period we must not use
a thread stack for interrupt processing.
Update #2809.
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Update #2809.
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Update #2751.
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Update #2809.
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Rename ppc_exc_min_frame to CPU_Interrupt_frame. Move it and the
corresponding defines to <rtems/score/cpuimpl.h>.
Update #2809.
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The only remaining user of CPU_Interrupt_frame on PowerPC is the mpc5xx
support. Move it to here.
Update #2809.
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Move CPU_Interrupt_frame related defines to <rtems/score/cpuimpl.h>.
Update #2809.
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Rename SPARC-specific CPU_Minimum_stack_frame to
SPARC_Minimum_stack_frame. Rename SPARC-specific
CPU_MINIMUM_STACK_FRAME_SIZE to SPARC_MINIMUM_STACK_FRAME_SIZE.
Update #2809.
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Rename SPARC64-specific CPU_Minimum_stack_frame to
SPARC64_Minimum_stack_frame. Rename SPARC64-specific
CPU_MINIMUM_STACK_FRAME_SIZE to SPARC64_MINIMUM_STACK_FRAME_SIZE.
Update #2809.
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Update #2808.
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Move CPU_PER_CPU_CONTROL_SIZE and the optional CPU_Per_CPU_control to
<rtems/score/cpuimpl.h> to hide it from <rtems.h>.
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This function is useful for operations which synchronously block, e.g.
self restart, self deletion, yield, sleep. It helps to detect if these
operations are called in the wrong context. Since the thread dispatch
necessary indicator is not used, this is more robust in some SMP
situations.
Update #2751.
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The thread dispatch inline option is no longer used.
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The POSIX cleanup list must be proteced from asynchronous thread
deletion. Here local interrupt disable is sufficient.
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Use the previously unused TPIDRPRW register to get the per-CPU control
of the current processor. This avoids instructions in
GET_SELF_CPU_CONTROL which are not available in Thumb mode.
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