rtems: Conditionally define rtems_interrupt_frame

Update #2808.

16 files changed, 21 insertions, 16 deletions

diff --git a/cpukit/rtems/include/rtems/rtems/types.h b/cpukit/rtems/include/rtems/rtems/types.h
index 978947615e..82c0edd3c3 100644
--- a/cpukit/rtems/include/rtems/rtems/types.h
+++ b/cpukit/rtems/include/rtems/rtems/types.h
@@ -98,13 +98,18 @@ typedef Context_Control            rtems_context;
 typedef Context_Control_fp         rtems_context_fp;
 #endif
 
+#if (CPU_ISR_PASSES_FRAME_POINTER == TRUE)
 /**
  * @brief Defines the format of the interrupt stack frame as it appears to a
  * user ISR.
  *
- * This data structure may not be defined on all ports
+ * This data structure is only provided if the interrupt stack frame is passed
+ * to the ISR handler.
+ *
+ * @see rtems_interrupt_catch().
  */
 typedef CPU_Interrupt_frame        rtems_interrupt_frame;
+#endif
 
 /**
  * @brief Information structure returned by the Heap Handler via the Region
diff --git a/cpukit/score/cpu/arm/rtems/score/cpu.h b/cpukit/score/cpu/arm/rtems/score/cpu.h
index 21d09a7737..e4f9e377d4 100644
--- a/cpukit/score/cpu/arm/rtems/score/cpu.h
+++ b/cpukit/score/cpu/arm/rtems/score/cpu.h
@@ -118,7 +118,7 @@
 
 #define CPU_ALLOCATE_INTERRUPT_STACK FALSE
 
-#define CPU_ISR_PASSES_FRAME_POINTER 0
+#define CPU_ISR_PASSES_FRAME_POINTER FALSE
 
 #define CPU_HARDWARE_FP FALSE
 
diff --git a/cpukit/score/cpu/bfin/rtems/score/cpu.h b/cpukit/score/cpu/bfin/rtems/score/cpu.h
index fb5198e227..d0c21cdeae 100644
--- a/cpukit/score/cpu/bfin/rtems/score/cpu.h
+++ b/cpukit/score/cpu/bfin/rtems/score/cpu.h
@@ -115,7 +115,7 @@ extern "C" {
  *
  * XXX document implementation including references if appropriate
  */
-#define CPU_ISR_PASSES_FRAME_POINTER 1
+#define CPU_ISR_PASSES_FRAME_POINTER TRUE
 
 /**
  * @def CPU_HARDWARE_FP
diff --git a/cpukit/score/cpu/epiphany/rtems/score/cpu.h b/cpukit/score/cpu/epiphany/rtems/score/cpu.h
index 23da66b4e8..9d11a3d0ad 100644
--- a/cpukit/score/cpu/epiphany/rtems/score/cpu.h
+++ b/cpukit/score/cpu/epiphany/rtems/score/cpu.h
@@ -117,7 +117,7 @@ extern "C" {
  *
  */
 
-#define CPU_ISR_PASSES_FRAME_POINTER 1
+#define CPU_ISR_PASSES_FRAME_POINTER TRUE
 
 /*
  *  Does the CPU have hardware floating point?
diff --git a/cpukit/score/cpu/i386/rtems/score/cpu.h b/cpukit/score/cpu/i386/rtems/score/cpu.h
index 4ba3b272fb..4dd98aee24 100644
--- a/cpukit/score/cpu/i386/rtems/score/cpu.h
+++ b/cpukit/score/cpu/i386/rtems/score/cpu.h
@@ -60,7 +60,7 @@ extern "C" {
  *  number (0)?
  */
 
-#define CPU_ISR_PASSES_FRAME_POINTER 0
+#define CPU_ISR_PASSES_FRAME_POINTER FALSE
 
 /*
  *  Some family members have no FP, some have an FPU such as the i387
diff --git a/cpukit/score/cpu/lm32/rtems/score/cpu.h b/cpukit/score/cpu/lm32/rtems/score/cpu.h
index feff8e6bc1..1bba1e40b6 100644
--- a/cpukit/score/cpu/lm32/rtems/score/cpu.h
+++ b/cpukit/score/cpu/lm32/rtems/score/cpu.h
@@ -113,7 +113,7 @@ extern "C" {
  *
  * XXX document implementation including references if appropriate
  */
-#define CPU_ISR_PASSES_FRAME_POINTER 1
+#define CPU_ISR_PASSES_FRAME_POINTER TRUE
 
 /**
  * @def CPU_HARDWARE_FP
diff --git a/cpukit/score/cpu/m32c/rtems/score/cpu.h b/cpukit/score/cpu/m32c/rtems/score/cpu.h
index 6b9e73e716..25953d7667 100644
--- a/cpukit/score/cpu/m32c/rtems/score/cpu.h
+++ b/cpukit/score/cpu/m32c/rtems/score/cpu.h
@@ -129,7 +129,7 @@ extern "C" {
  *
  * XXX document implementation including references if appropriate
  */
-#define CPU_ISR_PASSES_FRAME_POINTER 0
+#define CPU_ISR_PASSES_FRAME_POINTER FALSE
 
 /**
  * @def CPU_HARDWARE_FP
diff --git a/cpukit/score/cpu/m68k/rtems/score/cpu.h b/cpukit/score/cpu/m68k/rtems/score/cpu.h
index 307fae120b..f8184dc148 100644
--- a/cpukit/score/cpu/m68k/rtems/score/cpu.h
+++ b/cpukit/score/cpu/m68k/rtems/score/cpu.h
@@ -61,7 +61,7 @@ extern "C" {
  *  number (0)?
  */
 
-#define CPU_ISR_PASSES_FRAME_POINTER 0
+#define CPU_ISR_PASSES_FRAME_POINTER FALSE
 
 /*
  *  Some family members have no FP, some have an FPU such as the
diff --git a/cpukit/score/cpu/mips/rtems/score/cpu.h b/cpukit/score/cpu/mips/rtems/score/cpu.h
index d39e17db9d..4e1eba1ca6 100644
--- a/cpukit/score/cpu/mips/rtems/score/cpu.h
+++ b/cpukit/score/cpu/mips/rtems/score/cpu.h
@@ -136,7 +136,7 @@ extern "C" {
  *
  */
 
-#define CPU_ISR_PASSES_FRAME_POINTER 1
+#define CPU_ISR_PASSES_FRAME_POINTER TRUE
 
 
 
diff --git a/cpukit/score/cpu/no_cpu/rtems/score/cpu.h b/cpukit/score/cpu/no_cpu/rtems/score/cpu.h
index a32dc37346..f1b431e8d8 100644
--- a/cpukit/score/cpu/no_cpu/rtems/score/cpu.h
+++ b/cpukit/score/cpu/no_cpu/rtems/score/cpu.h
@@ -130,7 +130,7 @@ extern "C" {
  *
  * XXX document implementation including references if appropriate
  */
-#define CPU_ISR_PASSES_FRAME_POINTER 0
+#define CPU_ISR_PASSES_FRAME_POINTER FALSE
 
 /**
  * @def CPU_HARDWARE_FP
diff --git a/cpukit/score/cpu/or1k/rtems/score/cpu.h b/cpukit/score/cpu/or1k/rtems/score/cpu.h
index 9efc582cf3..6f0c9addd1 100644
--- a/cpukit/score/cpu/or1k/rtems/score/cpu.h
+++ b/cpukit/score/cpu/or1k/rtems/score/cpu.h
@@ -107,7 +107,7 @@ extern "C" {
  *
  */
 
-#define CPU_ISR_PASSES_FRAME_POINTER 1
+#define CPU_ISR_PASSES_FRAME_POINTER TRUE
 
 /*
  *  Does the CPU have hardware floating point?
diff --git a/cpukit/score/cpu/powerpc/rtems/score/cpu.h b/cpukit/score/cpu/powerpc/rtems/score/cpu.h
index 2223090f7f..bd729c0d80 100644
--- a/cpukit/score/cpu/powerpc/rtems/score/cpu.h
+++ b/cpukit/score/cpu/powerpc/rtems/score/cpu.h
@@ -544,7 +544,7 @@ typedef struct CPU_Interrupt_frame {
  *  number (0)?
  */
 
-#define CPU_ISR_PASSES_FRAME_POINTER 0
+#define CPU_ISR_PASSES_FRAME_POINTER FALSE
 
 /*
  *  Should the saving of the floating point registers be deferred
diff --git a/cpukit/score/cpu/sh/rtems/score/cpu.h b/cpukit/score/cpu/sh/rtems/score/cpu.h
index 02c719de5c..409b7a7a9f 100644
--- a/cpukit/score/cpu/sh/rtems/score/cpu.h
+++ b/cpukit/score/cpu/sh/rtems/score/cpu.h
@@ -87,7 +87,7 @@ extern "C" {
  *  number (0)?
  */
 
-#define CPU_ISR_PASSES_FRAME_POINTER 0
+#define CPU_ISR_PASSES_FRAME_POINTER FALSE
 
 /*
  *  Does the CPU have hardware floating point?
diff --git a/cpukit/score/cpu/sparc/rtems/score/cpu.h b/cpukit/score/cpu/sparc/rtems/score/cpu.h
index a4d3eef3dc..e7fc3b26fd 100644
--- a/cpukit/score/cpu/sparc/rtems/score/cpu.h
+++ b/cpukit/score/cpu/sparc/rtems/score/cpu.h
@@ -107,7 +107,7 @@ extern "C" {
  * The SPARC port does not pass an Interrupt Stack Frame pointer to
  * interrupt handlers.
  */
-#define CPU_ISR_PASSES_FRAME_POINTER 0
+#define CPU_ISR_PASSES_FRAME_POINTER FALSE
 
 /**
  * Does the CPU have hardware floating point?
diff --git a/cpukit/score/cpu/sparc64/rtems/score/cpu.h b/cpukit/score/cpu/sparc64/rtems/score/cpu.h
index f273a594ad..8e4012eeb3 100644
--- a/cpukit/score/cpu/sparc64/rtems/score/cpu.h
+++ b/cpukit/score/cpu/sparc64/rtems/score/cpu.h
@@ -84,7 +84,7 @@ extern "C" {
  *  number (0)?
  */
 
-#define CPU_ISR_PASSES_FRAME_POINTER 0
+#define CPU_ISR_PASSES_FRAME_POINTER FALSE
 
 /*
  *  Does the CPU have hardware floating point?
diff --git a/cpukit/score/include/rtems/score/isr.h b/cpukit/score/include/rtems/score/isr.h
index f76cbcbda8..d9c03b807f 100644
--- a/cpukit/score/include/rtems/score/isr.h
+++ b/cpukit/score/include/rtems/score/isr.h
@@ -58,7 +58,7 @@ typedef void * ISR_Handler_entry;
 /**
  *  Pointer to an ISR Handler
  */
-#if (CPU_ISR_PASSES_FRAME_POINTER == 1)
+#if (CPU_ISR_PASSES_FRAME_POINTER == TRUE)
 typedef ISR_Handler ( *ISR_Handler_entry )(
                  ISR_Vector_number,
                  CPU_Interrupt_frame *