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* 2001-01-29 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-292-0/+7
| | | | | * src/objectextendinformation.c: Added include of string.h to eliminate warning.
* 2001-01-25 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-253-6/+16
| | | | | | * cpu.c, rtems/score/cpu.h: Bug report from Peter Mueller <peter.o.mueller@gmx.de> because of not correcting for the ISR vector table now being allocated from the workspace.
* 2001-01-12 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-122-2/+7
| | | | | * rtems/score/mips.h (mips_get_sr, mips_set_sr): Corrected register constraints from "general" to "register".
* 2001-01-09 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-094-6/+27
| | | | | * cpu_asm.S: Use SR_INTERRUPT_ENABLE_BITS instead of SR_XXX constants to make it easier to conditionalize the code for various ISA levels.
* 2001-01-08 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-082-0/+9
| | | | | * src/threadinitialize.c: Fix my bad hack of Ralf's fp_area warning removal patch. :(
* 2001-01-08 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2001-01-082-0/+6
| | | | * src/threadinitialize.c: Removed warning.
* 2001-01-08 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-085-3/+18
| | | | | | | | * idtcpu.h: Commented out definition of "wait". It was stupid to use such a common word as a macro. * rtems/score/cpu.h (_CPU_ISR_Disable): Fixed for mips ISA 3. * rtems/score/mips.h: Added include of <idtcpu.h>. * rtems/score/mips.h (mips_enable_in_interrupt_mask): Corrected.
* 2001-01-03 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-0314-6/+99
| | | | * rtems/score/cpu.h: Added _CPU_Initialize_vectors().
* 2001-01-03 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-0312-7/+61
| | | | | | * rtems/score/cpu.h: Added _CPU_Initialize_vectors(). * cpu_asm.S: Modify to properly dereference _ISR_Vector_table now that it is dynamically allocated.
* 2001-01-03 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-033-7/+20
| | | | | * rtems/score/cpu.h: Added _CPU_Initialize_vectors(). * cpu_asm.S: Eliminated warning for duplicate definition of EXTERN.
* 2001-01-03 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-033-3/+13
| | | | | | | * rtems/score/cpu.h: Added _CPU_Initialize_vectors(). * cpu_asm.S: Modify to properly dereference _ISR_Vector_table now that it is dynamically allocated.
* 2001-01-03 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-031-4/+0
| | | | * ChangeLog: Removed duplicate entry.
* 2001-01-03 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-032-0/+7
| | | | * rtems/score/cpu.h: Added _CPU_Initialize_vectors().
* 2001-01-03 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-035-0/+25
| | | | * rtems/score/cpu.h: Added _CPU_Initialize_vectors().
* 2001-01-03 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-032-0/+10
| | | | * rtems/score/cpu.h: Added _CPU_Initialize_vectors().
* 2000-12-19 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-12-192-4/+9
| | | | | * src/isr.c: Allocate the _ISR_Vector_table all the time not just when we are allocating an interrupt stack.
* 2000-12-19 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-12-192-1/+9
| | | | | | * cpu_asm.S (_ISR_Handler): Return to the address in the EPC register. Previous code resulting in the interrupted immediately returning to the caller of the routine it was inside.
* 2000-12-19 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-12-192-11/+5
| | | | | * cpu.c (_CPU_Initialize): Do not initialize _ISR_Vector_table() here because it has not been allocated yet.
* 2000-12-19 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-12-192-1/+8
| | | | | | * cpu.c: Do not read or write raw interrupt vector table if we are on a CPU that does not have a %vbr register and the BSP is configured as having the table in ROM.
* 2000-12-13 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-12-133-1/+11
| | | | | | * include/rtems/score/isr.h, src/isr.c: Allocate it from the workspace rather than explicitly declaring it. This allows the size to be a non-constant from the perspective of score/cpu.
* 2000-12-13 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-12-134-82/+16
| | | | | | | | * cpu.c: Removed duplicate declaration for _ISR_Vector_table. * cpu_asm.S: Removed assembly language to vector ISR handler on MIPS ISA I. Now call mips_vector_isr_handlers() in libcpu or BSP. * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): No longer a constant -- get the real value from libcpu.
* 2000-12-13 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-12-1312-525/+322
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * cpu_asm.h: Removed. * Makefile.am: Remove cpu_asm.h. * rtems/score/mips64orion.h: Renamed mips.h. * rtems/score/mips.h: New file, formerly mips64orion.h. Header rewritten. (mips_get_sr, mips_set_sr, mips_enable_in_interrupt_mask, mips_disable_in_interrupt_mask): New macros. * rtems/score/Makefile.am: Reflect renaming mips64orion.h. * asm.h: Include <mips.h> not <mips64orion.h>. Now includes the few defines that were in <cpu_asm.h>. * cpu.c (_CPU_ISR_Get_level): Added MIPS ISA I version of this routine. MIPS ISA 3 is still in assembly for now. (_CPU_Thread_Idle_body): Rewrote in C. * cpu_asm.S: Rewrote file header. (FRAME,ENDFRAME) now in asm.h. (_CPU_ISR_Get_level): Removed ISA I version and rewrote in C. (_CPU_ISR_Set_level): Removed ISA I version and rewrote in C. (_CPU_Context_switch): MIPS ISA I now manages preserves SR_IEC and leaves other bits in SR alone on task switch. (mips_enable_interrupts,mips_disable_interrupts, mips_enable_global_interrupts,mips_disable_global_interrupts, disable_int, enable_int): Removed. (mips_get_sr): Rewritten as C macro. (_CPU_Thread_Idle_body): Rewritten in C. (init_exc_vecs): Rewritten in C as mips_install_isr_entries() and placed in libcpu. (exc_tlb_code, exc_xtlb_code, exc_cache_code, exc_norm_code): Moved to libcpu/mips/shared/interrupts. (general): Cleaned up comment blocks and #if 0 areas. * idtcpu.h: Made ifdef report an error. * iregdef.h: Removed warning. * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): Now a variable number defined by libcpu. (_CPU_ISR_Disable, _CPU_ISR_Enable): Rewritten to use new routines to access SR. (_CPU_ISR_Set_level): Rewritten as macro for ISA I. (_CPU_Context_Initialize): Honor ISR level in task initialization. (_CPU_Fatal_halt): Use new _CPU_ISR_Disable() macro.
* 2000-12-06 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-12-062-0/+5
| | | | * cpu.c: Added include of <rtems/rtems/cache.h> to eliminate warning.
* 2000-12-06 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-12-062-0/+21
| | | | | * rtems/score/cpu.h: When mips ISA level is 1, registers in the context should be 32 not 64 bits.
* 2000-12-01 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-12-013-15/+21
| | | | | | | | * macros/rtems/score/coresem.inl: Removed comments since convention calls for comments to be in inline versin. * macros/rtems/score/object.inl (Objects_Get_local_object): Fixed style to use _ prefix on variable names and use parentheses. * macros/rtems/score/object.inl (_Objects_Namespace_remove): Added.
* 2000-11-30 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-11-307-4/+143
| | | | | | | | | | | | | | | | | | * General effort to make things compile with macros not inlines * inline/rtems/score/coremutex.inl: Added comment indicating for macros there is another copy of _CORE_mutex_Seize_interrupt_trylock() in src/coremutexseize.c. * src/coremutexseize.c: Added body of _CORE_mutex_Seize_interrupt_trylock() for macro case. * macros/rtems/score/coremutex.inl: Added prototype for _CORE_mutex_Seize_interrupt_trylock() since there is a real body when macros are enabled. * macros/rtems/score/coresem.inl: Added macro implementation of _CORE_semaphore_Seize_isr_disable. * macros/score/Makefile.am: Fixed typos. * rtems/score/address.inl: Correct macro implementation of _Addresses_Is_aligned() so it would compile. * macros/rtems/score/coremsg.inl: Added closing parentheses.
* 2000-11-30 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-11-302-2/+14
| | | | | | * cpu_asm.S: Changed "_CPU_Ccontext_switch_restore: typo to correct name of _CPU_Context_switch_restore. Added dummy version of exc_utlb_code() so applications would link.
* 2000-11-28 Chris Johns <ccj@acm.org>Joel Sherrill2000-11-282-1/+18
| | | | | | | | | * src/heapallocate.c: Do not allow the size to overflow when adjusting it. A test allocated a stack of -1 (~0). This actually resulted in a stack being allocated but with a size of 0xb. The allocator did not test the size to see if it rolled through 0 and so allowed the allocation to happen, the thread to get created. The task crashed as you would expect.
* 2000-11-21 Jiri Gaisler <jgais@ws.estec.esa.nl>Joel Sherrill2000-11-212-3/+14
| | | | * cpu_asm.S: Fix for CPUs with FPU revision B or C.
* 2000-11-14 Jiri Gaisler <jgais@ws.estec.esa.nl>Joel Sherrill2000-11-153-1/+20
| | | | | | * cpu.c, rtems/cpu/sparc.h: Make floating point optional based on gcc arguments. Do not initialize FP context if there is no FPU. Flush instruction cache after installing RTEMS trap handler.
* 2000-11-09 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-11-0934-17/+85
| | | | * Makefile.am: Use ... instead of RTEMS_TOPdir in ACLOCAL_AMFLAGS.
* 2000-11-02 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-11-032-1/+7
| | | | | | * include/rtems/system.h: Use proper conditional (RTEMS_POSIX_API) so prototypes for POSIX_MP_NOT_IMPLEMENTED(), POSIX_NOT_IMPLEMENTED(), POSIX_BOTTOM_REACHED() are actually included.
* 2000-11-02 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-11-022-1/+16
| | | | | | * aclocal/canonicalize-tools.m4, aclocal/check-tool.m4, aclocal/prog-cc.m4, aclocal/prog-cxx.m4: Replace AC_CHECK_TOOL with an RTEMS specific but more restrictive autoconf macro.
* 2000-11-02 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-11-0234-17/+85
| | | | * Makefile.am: Switch to ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal.
* 2000-10-25 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-10-2534-17/+102
| | | | | * Makefile.am: ACLOCAL_AMFLAGS= -I $(RTEMS_TOPdir)/macros. Switch to GNU canonicalization.
* 2000-10-24 Alan Cudmore <alanc@linuxstart.com> andJoel Sherrill2000-10-2412-194/+662
| | | | | | | | | | | | | | | | | | | | | | | | | | | Joel Sherrill <joel@OARcorp.com> * This is a major reworking of the mips64orion port to use gcc predefines as much as possible and a big push to multilib the mips port. The mips64orion port was copied/renamed to mips to be more like other GNU tools. Alan did most of the technical work of determining how to map old macro names used by the mips64orion port to standard compiler macro definitions. Joel did the merge with CVS magic to keep individual file history and did the BSP modifications. Details follow: * Makefile.am: idtmon.h in mips64orion port not present. * asm.h: MIPS64ORION replaced with MIPS. Frame setup macros added. * cpu.c: Comments added. * cpu_asm.S: Conditionals changed. MIPS ISA level 1 support added. First attempt at exception/interrupt processing for ISA level 1 and minus any use of IDT/MON added. * idtcpu.h: Conditionals changed to use gcc predefines. * iregdef.h: Ditto. * cpu_asm.h: No real change. Merger required commit. * rtems/Makefile.am: Ditto. * rtems/score/Makefile.am: Ditto. * rtems/score/cpu.h: Change MIPS64ORION to MIPS. * rtems/score/mips64orion.h: Change MIPS64ORION to MIPS. Convert from using RTEMS_CPU_MODEL to gcc predefines to figre things out.
* 2000-10-20 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-10-202-0/+9
| | | | * shared/ppc.h: For multilibs, derive PPC_HAS_FPU from _SOFT_FLOAT.
* 2000-10-19 Antti P Miettinen <anmietti@trshp.ntc.nokia.com>Joel Sherrill2000-10-194-9/+24
| | | | | * rtems/score/cpu.h: define CPU_Exception_frame for rdbg. * m68302.h: Make buffer pointer in m302_SCC_bd volatile.
* 2000-10-18 Nick Simon <Nick.SIMON@syntegra.bt.co.uk>Joel Sherrill2000-10-184-1/+152
| | | | | | * src/heapgetinfo.c, include/rtems/score/heap.h, src/Makefile.am: Added _Heap_Get_information() and information control block. * src/heapgetinfo.c: New file.
* 2000-10-18 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-10-183-17/+29
| | | | | | | * cpu_asm.S, rtems/score/cpu.h: Modified to better support multilibing. These changes result in the code being able to compile with the default gcc settings. It is not functional in this configuration but does compile.
* 2000-10-18 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-10-182-5/+13
| | | | | * rtems/score/c4x.h: Modified to properly multilib. This required using only macros predefined by gcc.
* 2000-10-12 John S Gwynne <jgwynne@mrcday.com>Joel Sherrill2000-10-123-10/+22
| | | | | | | | | | | | | | * sim.h: These changes enable RTEMS to automatically generate the ram_init file used by gdb with the BDM patches. The 332 has on-board chip select lines (for RAM and FLASH) that must be configured before use of these peripherals. These patches parse data from start.c where the chip select lines are configured in the runtime executable and automatically generates the gdb initialization file using the same settings. A great time saver. A similar file, ram_init_FW (flash writable), is also generated that the flash programming tool uses. * BSP/start/start.c: Must be modified to support above. * BSP/start/ram_init.ld, BSP/start/ram_init.sed: New files.
* 2000-09-25 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-09-252-2/+9
| | | | | * rtems/system.h: Switched a29k and hppa1.1 to using cpuopts.h not targopts.h to reduce dependency on BSP.
* 2000-09-25 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-09-252-0/+12
| | | | | * rtems/score/hppa.h: Switched to using cpuopts.h not targopts.h to reduce dependency on BSP.
* 2000-09-25 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-09-253-5/+18
| | | | | * rtems/score/a29k.h, rtems/score/cpu.h: Switched to using cpuopts.h not targopts.h to reduce dependency on BSP.
* 2000-09-22 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-09-227-8/+87
| | | | | | * amd.ah, cpu.c, cpu_asm.S, register.ah, sig.S, rtems/score/cpu.h: Updated and fixed minor things. Commented out offensive assembly and made applications link.
* 2000-09-22 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-09-225-17/+26
| | | | | | * Makefile.am, cpu_asm.S, psmacro.ah, rtems/score/cpu.h: First attempt to compile with GNU tools. Minor modifications to compile enough to get to assembler errors.
* 2000-09-20 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-09-202-1/+5
| | | | | * src/objectgetbyindex.c: Do not enable dispatching on an error path it was not disabled on.
* 2000-09-12 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-09-122-1/+5
| | | | * rtems/score/i386.h: Corrected "#elsif" to be "#elif".
* 2000-09-12 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-09-122-1/+5
| | | | * Makefile.am: Use += to set up AM_CPPFLAGS.
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