| Commit message (Collapse) | Author | Age | Files | Lines |
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that addresses aspects of the targopts.h multilib related
issues.
Changes:
* Move targopts.h to libbsp/include, because the current targopts.h
actually is a per-BSP-header and therefore can not stay below exec/.
* Introduce an autoheader generated header file
(exec/score/include/rtems/score/cpuopts.h), which shall take per-cpu
configuration options only.
* Move all autoconf-detectable/configure specified per-cpu
option-defines from targopts.h to cpuopts.h.
* Add Makefiles to the libbsp/shared directory hierarchy.
Notes:
* The new per-bsp targopts.h in libbsp includes the per-cpu
cpuopts.h. This way, the new targopts.h is kept backward compatible
to the old targopts.h and existing BSPs which (carelessly) include
targopts.h (i386, ppc) should be kept working when using the
multilib-disabled configuration scheme.
* cpuopts.h is not yet complete, because the per-BSP make-targopts
rules from custom/<BSP>.cfg files can not be applied to files below
exec/ when building multilibs.
* All files below exec/ should not include targopts.h anymore, but
should include cpuopts.h instead. However, eliminating inclusion of
targopts.h currently triggers further structural / header file inclusion
related issues, because several ports apply BSP or CPU_MODEL specific
defines from targopts.h below exec/
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from score/cpu to libcpu because the determination of which to use is
based on RTEMS_CPU_MODEL. Thus it can not be determined based solely on
multilib information.
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static inline routine _CORE_mutex_Seize_interrupt_trylock since
static routines are not included when in an application.
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if the mutex is successfully obtained.
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code remaining here now only blocks.
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dispatching -- disabled.
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_Interrupt_Manager_initialization.
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to be consistent with other ports.
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Hitachi H8 family. This port was done by Philip Quaife
<philip@qs.co.nz> of Q Solutions and sponsored by
Comnet Technologies Ltd. The port was done based on RTEMS 3.5.1
to a Hitach H8300H. The port was updated to RTEMS 4.5 style
Makefiles/configure by Joel Sherrill <joel@OARcorp.com>.
While doing this Joel added support for the h8300-rtems to
binutils, gcc, newlib, and gdb.
NOTE: Philip submitted a BSP for a Hitachi evaluation board
which is being merged as a separate entity.
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that breaks when the target has 16 bit address space. One of the H8
multilibs is a 16-bit address space CPU. When a real attempt is
made to support this CPU model, the code that assumes an address
is 32 bits will have to change. This constant is probably not
flagging all impacted code.
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<corsepiu@faw.uni-ulm.de> that migrates the SH port to
multilib'ing. This patch involved moving a number of
files in the CVS repository, adding new files, and
deleting files from their previous location. Ralf
gave good instructions (not repeated here) and here
are his notes:
Note 1: In this version, I did not change the installation points of
the headers which are moved inside of the source-tree. This is a
temporary hack for not breaking compatibility with 4.5 based BSPs,
but will probably not last once having real multilibs (We would have
include file conflicts when several BSPs/CPU_MODELS share a common
installation prefix).
Note 2: I hope not to have broken too much, but I would not be
astonished if something goes wrong.
Note 3: There are more patches to come :)
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mpc8xx libcpu support for the first time and remove includes
of bsp.h, references to BSP_Configuration, and Cpu_table. All
of these can be obtained directly from RTEMS now.
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now is an implementation of the prototypes in rtems/rtems/cache.h.
The libcpu/i386/wrapup directory is no longer needed.
The PowerPC needs this done to it.
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<charles.gauthier@iit.nrc.ca>, and Darlene A. Stewart
<Darlene.Stewart@nrc.ca> to add support for a number of very
significant things:
+ BSPs for many variations on the Motorola MBX8xx board series
+ Cache Manager including initial support for m68040
and PowerPC
+ Rework of mpc8xx libcpu code so all mpc8xx CPUs now use
same code base.
+ Rework of eth_comm BSP to utiltize above.
John reports this works on the 821 and 860
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adds .cvsignore.
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adds .cvsignore.
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compiled and there is no comparable code for the C4x.
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linkcmds updated, simio references removed, and switch to libchip for
serial ports from simio.
Added a MEMORY_MAP file to capture information about the various
addresses on this board.
In addition, many of the beta patches are now included.
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that contains:
* Removes remaining (now illegal) references to $(SRC) from a couple of
Makefile.ams
* Removes duplicate AC_CONFIG_SUBDIRS macro from c/configure.in
* Moves ENABLE_LIBCDIR into RTEMS_PROG_C[C|XX]_FOR_TARGET (hides LIBCDIR
from most configure scripts, i.e. LIBCDIR becomes less visible)
* Adds RTEMS_PROG_C[C|XX]_FOR_TARGET and RTEMS_CANONICALIZE_TOOLS to
libbsp/*/configure.ins (A minor bug in previous implementations, which
only has an impact when switching to GNU/Cygnus canonicalization)
* Cleans up several bogus comments.
* Removes MKLIB
* Switches the version number to 4.5.0 (for testing version number
handling)
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Ralf Corsepius <corsepiu@faw.uni-ulm.de> that contain:
* Modifications, (minor) corrections, cleanups to most existing
Makefile.ams
* Adds automake support to all remaining BSPs which have not yet been
converted to automake.
* Makefile.am for all remaining wrapup/Makefile.ams
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pc686.cfg was not present.
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I'd like to propose a change to RTEMS task variables that I think would
make them more useful. I think that it is early enough in their
existence to still make changes to their API.
1) Change type from `int' to `void *'.
2) Add extra argument to task_variable_add -- if non-NULL, a pointer to
a `destructor' function to be called when the task exits. This function
would be called with that task's value of the task variable as its
argument. In many cases, the `dtor' function could be `free'.
rtems_status_code rtems_task_variable_add (
rtems_id tid, void **ptr, void (*dtor)(void *));
rtems_status_code rtems_task_variable_delete (rtems_id tid, void **ptr);
This would be all we'd need to cleanly and efficiently support C++
per-thread exception information without dragging in all that POSIX API
stuff.
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blocking sends when the queue is full. The SuperCore was enhanced
to support blocking on send. The existing POSIX API was debugged
and numerous test cases were added to psxmsgq01 by Jennifer Averett.
SuperCore enhancements and resulting modifications to other APIs
were done by Joel.
There is one significant point of interpretation for the POSIX API.
What happens to threads already blocked on a message queue when the
mode of that same message queue is changed from blocking to non-blocking?
We decided to unblock all waiting tasks with an EAGAIN error just
as if a non-blocking version of the same operation had returned
unsatisfied. This case is not discussed in the POSIX standard and
other implementations may have chosen differently.
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and _CORE_message_queue_Insert_message for posix message queues.
+ Yellow line tested new source
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+ Yellow lined tested routine with Posix message queue test (01)
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power binary/mutex style semaphores already supported by RTEMS. This
was done at the request of Eric Norum <eric@cls.usask.ca> in support
of his effort to port EPICS to RTEMS. This change consisted of
changing the nesting_allowed boolean into a lock_nesting_behavior
enumerated value as well as allowing the core mutex object to optionally
support ensuring that the holder of a binary semaphore released it.
Finally, a more subtle enhancement was to allow the non-holder to release
a priority inheritance/ceiling mutex and still allow the holding task
to return to its original priority.
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+ Changed priority to be based off of min and max int.
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