| Commit message (Collapse) | Author | Age | Files | Lines |
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Include <bsp/default-initial-extension.h> in all BSPs. Call
rtems_fatal() with RTEMS_FATAL_SOURCE_EXIT as source and the exit()
status code as fatal code in every bsp_cleanup(). Move previous
bsp_cleanup() code into bsp_fatal_extension().
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Add rtems_bdbuf_fatal_code as a replacement for the previous fatal error
codes. Remove unused error codes. Add new error codes. Use
rtems_fatal() with RTEMS_FATAL_SOURCE_BDBUF as source.
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This enum value ensures that the enum type needs at least 32-bits for
architectures with short enums.
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Use INTERNAL_ERROR_CPU_ISR_INSTALL_VECTOR on PowerPC for
_CPU_ISR_install_vector().
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Add Internal_errors_Information::nest_level. This helps to detect
recursive calls to _Internal_error_Occurred().
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This function is only used if CPU_HAS_HARDWARE_INTERRUPT_STACK == TRUE.
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Offset calculation was wrong for 16-bit and 64-bit pointer targets.
Remove unused offsets. Move Per_CPU_Control::dispatch_necessary after
Per_CPU_Control::isr_nest_level. Move SMP members to end of structure.
All assembler relevant members are now at the structure beginning.
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Define _System_state_Current and _Internal_errors_What_happened in
interr.c to make _Internal_error_Occurred() more independent.
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The initial extensions remain now in a read-only table and will not be
copied to work space memory. The extension chains are statically
initialized. This makes it possible to call _User_extensions_Iterate()
independent of the system state. It is now guaranteed that the fatal
callout of the initial extensions will be called provided the stack
pointer, the read-only data, and code memory are valid.
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Replace the separate user extension iterations with a single iteration
function. This reduces code size and improves maintainability since the
iteration logic is only in one function. The runtime overhead is
insignificant.
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System events are similar to normal events. They offer a second set of
events. These events are intended for internal RTEMS use and should not
be used by applications (with the exception of the transient system
event).
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The work areas (RTEMS work space and C program heap) will be initialized
now in a separate step and are no longer part of
rtems_initialize_data_structures(). Initialization is performed with
tables of Heap_Area entries. This allows usage of scattered memory
areas present on various small scale micro-controllers.
The sbrk() support API changes also. The bsp_sbrk_init() must now deal
with a minimum size for the first memory chunk to take the configured
work space size into account.
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The _Heap_Extend() has now the same signature as _Heap_Initialize().
The 4th parameter is ignored (page size in _Heap_Initialize()).
Add Heap_Area and Heap_Initialization_or_extend_handler.
Add and test _Heap_No_extend().
This helps to do a table based heap initialization and extension.
Create a table of Heap_Area elements and iterate through it. Set the
handler to _Heap_Initialize() in the first iteration and then to
_Heap_Extend().
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Use _Workspace_Allocate_or_fatal_error() consistently in case auto
extend is turned off. This helps to avoid undefined behaviour in
_API_Mutex_Allocate() in case _API_Mutex_Information() fails.
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The changes in _Thread_Dispatch() of commits
dad36c52b8be5d7b46bc7af85655055db7208652 and
d4dc7c8196355f08044e67a3f5c1e19485f17ff1 introduced a severe bug which
destroys the real-time properties of RTEMS completely.
Consider the following scenario. We have three tasks L (lowest
priority), M (middle priority), and H (highest priority). Now let a
thread dispatch from M to L happen. An interrupt occurs in
_Thread_Dispatch() here:
void _Thread_Dispatch( void )
{
[...]
post_switch:
_ISR_Enable( level );
<-- INTERRUPT
<-- AFTER INTERRUPT
_Thread_Unnest_dispatch();
_API_extensions_Run_postswitch();
}
The interrupt event makes task H ready. The interrupt code will see
_Thread_Dispatch_disable_level > 0 and thus doesn't perform a
_Thread_Dispatch(). Now we return to position "AFTER INTERRUPT". This
means task L executes now although task H is ready! Task H will execute
once someone calls _Thread_Dispatch().
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At the previous location, uint32_t was not available.
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This field is used whether ticks are used for statistics or not.
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This code was reviewed as part of coverage analysis improvements. The
uncovered range had unclear documentation and the code itself was also
cleaned up to be easier to understand.
Author: Krzysztof Mięsowicz <krzysztof.miesowicz@gmail.com>
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Due to the fact that CBS extends the EDF scheduler, most parts of EDF are
reused. One part is the allocation of the per-thread data. However, the CBS
per-thread structure defines a further element (while including the rest of
Scheduler_EDF_Per_thread)
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The 64-bit timestamps were introduced to simplify the timestamp
calculations. This works well since nearly all operations are
additions. The previous _TOD_Tickle_ticks() implementation had a
serious performance regression in case of 64-bit timestamps due to the
usage of two 64-bit divisions which are quite expensive on some
architectures.
A new field seconds_trigger in TOD_Control is introduced to trigger the
_Watchdog_Tickle_seconds() in _TOD_Tickle_ticks(). This avoids the
64-bit divisions completely and only 32-bit additions are used.
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Group the global TOD variables (_TOD_Now, _TOD_Uptime, and _TOD_Is_set)
in a structure to reduce address loads in _TOD_Tickle_ticks().
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Port
+ v850 does not have appear to have any optimized bit scan instructions
+ v850 does have single instructions for wap u16 and u32
+ Code path optimization preferences set
+ Add BSP variants for each GCC CPU model flag and a README
- v850e1 variant does not work (fails during BSP initialization)
BSP for GDB v850 Simulator
+ linkcmds matches defaults in GDB simulator with RTEMS mods
+ crt1.c added from v850 newlib port for __main()
+ BSP exits cleanly
+ printk and console I/O work
+ uses clock tick from IDLE task
+ Tests not requiring real clock ISR work
Documentation
+ CPU Supplment chapter for v850 added
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_CPU_ISR_Initialize
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