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* score: Include missing <limits.h>Sebastian Huber2017-09-191-0/+2
| | | | | Update #2132. Close #3140.
* score: Remove <string.h> include from basedefs.hSebastian Huber2017-08-251-7/+0
| | | | Close #2133.
* score: Remove <limits.h> include from basedefs.hSebastian Huber2017-08-251-7/+0
| | | | Close #2132.
* Include missing <limits.h>Sebastian Huber2017-08-251-0/+1
| | | | Update #2132.
* Include missing <string.h>Sebastian Huber2017-08-251-0/+2
| | | | Update #2133.
* powerpc: PPC64_NOP_FOR_LINKER_TOC_POINTER_RESTORESebastian Huber2017-08-221-0/+5
| | | | | | | In 64-bit mode, the linker must have the ability to restore the TOC pointer after an external function call. Update #3082.
* powerpc: Add 64-bit context/interrupt supportSebastian Huber2017-08-226-187/+263
| | | | Update #3082.
* powerpc: 64-bit _CPU_Context_Initialize() supportSebastian Huber2017-08-221-2/+2
| | | | Update #3082.
* powerpc: 64-bit support for CPU_SIZEOF_POINTERSebastian Huber2017-08-221-0/+4
| | | | Update #3082.
* powerpc: ppc_interrupt_get_disable_mask()Sebastian Huber2017-08-221-1/+1
| | | | | | Fix warning on 64-bit PowerPC. Update #3082.
* powerpc: Add register definesSebastian Huber2017-08-221-0/+16
| | | | Update #3082.
* heap: Fix integer typesSebastian Huber2017-08-221-3/+3
| | | | Update #3082.
* score: Fix format specifierSebastian Huber2017-08-221-1/+1
| | | | Update #3082.
* arm: Use ARM code on Thumb 1 targetsSebastian Huber2017-08-101-1/+1
| | | | Update #3093.
* arm: Validate IT[7:0] bit field of PSRSebastian Huber2017-08-101-1/+25
| | | | Update #3093.
* powerpc: Add register definesSebastian Huber2017-07-311-0/+26
| | | | | Update #3082. Update #3085.
* score: Add RTEMS_HAVE_MEMBER_SAME_TYPE()Sebastian Huber2017-07-312-2/+25
| | | | This fixes some "variably modified" warnings and a clang compile error.
* bsp/t32mppc: Add SMP supportSebastian Huber2017-07-281-0/+3
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* sparc: Add lazy floating point switchSebastian Huber2017-07-256-219/+136
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The SPARC ABI is a bit special with respect to the floating point context. The complete floating point context is volatile. Thus, from an ABI point of view nothing needs to be saved and restored during a context switch. Instead the floating point context must be saved and restored during interrupt processing. Historically, the deferred floating point switch was used for SPARC and the complete floating point context is saved and restored during a context switch to the new floating point unit owner. This is a bit dangerous since post-switch actions (e.g. signal handlers) and context switch extensions may silently corrupt the floating point context. The floating point unit is disabled for interrupt handlers. Thus, in case an interrupt handler uses the floating point unit then this will result in a trap (INTERNAL_ERROR_ILLEGAL_USE_OF_FLOATING_POINT_UNIT). In uniprocessor configurations, a lazy floating point context switch is used. In case an active floating point thread is interrupted (PSR[EF] == 1) and a thread dispatch is carried out, then this thread is registered as the floating point owner. When a floating point owner is present during a context switch, the floating point unit is disabled for the heir thread (PSR[EF] == 0). The floating point disabled trap checks that the use of the floating point unit is allowed and saves/restores the floating point context on demand. Update #3077.
* INTERNAL_ERROR_ILLEGAL_USE_OF_FLOATING_POINT_UNITSebastian Huber2017-07-251-1/+2
| | | | | | Add new fatal error INTERNAL_ERROR_ILLEGAL_USE_OF_FLOATING_POINT_UNIT. Update #3077.
* sparc: Rename SPARC_USE_SAFE_FP_SUPPORTSebastian Huber2017-07-253-28/+30
| | | | | | | Rename SPARC_USE_SAFE_FP_SUPPORT in SPARC_USE_SYNCHRONOUS_FP_SWITCH. Update comment. Update #3077.
* score: Add optional _CPU_Context_Destroy()Sebastian Huber2017-07-253-1/+27
| | | | Update #3077.
* score: Fix warningSebastian Huber2017-07-181-1/+1
| | | | Update #3059.
* sparc: Add assembly workaround for LEON3FT B2BST errataDaniel Cederman2017-07-173-0/+33
| | | | | | | | | | | | | | | This patch adds NOP instructions to prevent instruction sequences that are sensitive to the LEON3FT B2BST errata. See GRLIB-TN-0009: "LEON3FT Stale Cache Entry After Store with Data Tag Parity Error" for more information. The sequences are only modified if __FIX_LEON3FT_B2BST is defined. The patch works in conjunction with the -mfix-ut700, -mfix-gr712rc, and -mfix-ut699 GCC flags that prevents the sensitive sequences from being generated. Update #3057.
* score: Fix typoSebastian Huber2017-07-121-1/+1
| | | | Update #3059.
* Add interrupt vector set/get affinitySebastian Huber2017-07-121-0/+25
| | | | Close #3071.
* score: Fix set schedulerSebastian Huber2017-07-101-5/+13
| | | | | | | Ensure that the thread processor affinity fits the new scheduler instance. Update #3059.
* score: Add simple affinity support to EDF SMPSebastian Huber2017-07-108-104/+592
| | | | Update #3059.
* score: Pass scheduler nodes to processor allocatorSebastian Huber2017-07-071-18/+14
| | | | | | | This allows scheduler implementations to easily access scheduler-specific data. Update #3059.
* score: Add scheduler node to set affinity opSebastian Huber2017-07-076-14/+14
| | | | Update #3059.
* score: Fix default set affinitySebastian Huber2017-07-071-4/+3
| | | | | | | | The set of online processors must be a subset of the thread processor affinity for the schedulers without arbitrary processor affinity support to avoid problems in case of processor addition and removal. Update #3059.
* score: Introduce _SMP_Get_online_processors()Sebastian Huber2017-07-073-2/+14
| | | | Update #3059.
* score: Use processor mask for set affinitySebastian Huber2017-07-076-62/+40
| | | | Update #3059.
* score: Add processor set to scheduler contextSebastian Huber2017-07-073-23/+11
| | | | | | | Replace the simple processor count with the processor set owned by the scheduler instance. Update #3059.
* score: Move processor affinity to Thread_ControlSebastian Huber2017-07-0711-143/+20
| | | | Update #3059.
* score: Add some processor mask functionsSebastian Huber2017-07-061-0/+99
| | | | Update #3059.
* score: Add processor mask to/from cpu_set_tSebastian Huber2017-07-063-2/+126
| | | | Update #3059.
* score: Use <sys/bitset.h> for Processor_maskSebastian Huber2017-07-064-63/+56
| | | | | | | | Implement the Processor_mask via <sys/bitset.h>. Provide _Processor_mask_To_uint32_t() to enable its use in device specific routines, e.g. interrupt affinity register in an interrupt controller. Update #3059.
* score: Fix formatSebastian Huber2017-07-051-14/+7
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* score: Avoid clash with <strings.h> provided fls()Sebastian Huber2017-07-051-1/+2
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* arm: Fix ARMv7-M interrupt processingSebastian Huber2017-07-042-30/+48
| | | | | | | | | | | | Right after a "msr basepri_max, %[basepri]" instruction an interrupt service may still take place (observed at least on Cortex-M7). However, pendable service calls that are activated during this interrupt service may be delayed until interrupts are enable again. The _ARMV7M_Pendable_service_call() did not check that a thread dispatch is allowed. Move this test from _ARMV7M_Interrupt_service_leave() to _ARMV7M_Pendable_service_call(). Update #3060.
* score: Add assert to _Thread_Dispatch()Sebastian Huber2017-07-041-0/+1
| | | | Update #3060.
* score: Add RTEMS_NO_INLINESebastian Huber2017-06-291-1/+11
| | | | Update #3056.
* score: Add SMP EDF schedulerSebastian Huber2017-06-296-16/+658
| | | | Update #3056.
* score: Add red-black tree node to Scheduler_NodeSebastian Huber2017-06-297-39/+47
| | | | | | | In SMP configurations, add a red-black tree node to Scheduler_Node to enable an EDF scheduler implementation. Update #3056.
* powerpc: Fix PPC_CONTEXT_VOLATILE_SIZESebastian Huber2017-06-201-0/+4
| | | | Account for legacy AltiVec context.
* powerpc: Fix TLS supportSebastian Huber2017-06-201-10/+11
| | | | | Do not zero the GPR2 in the thread context via dcbz instructions. Bug was introduced by 32b4a0c42704f0076da8e2d5411290f55d1b2965.
* score: Remove rtems_ada_selfSebastian Huber2017-06-142-12/+0
| | | | | | This task variable is superfluous since we use thread-local storage now. Update #2289.
* i386: Support thread-local storage (TLS)Sebastian Huber2017-06-124-11/+62
| | | | Update #2468.
* i386: Move _CPU_Context_Initialize()Sebastian Huber2017-06-092-46/+65
| | | | Update #2468.