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* or1k/cpu.c: Eliminate dependency on BSP provided headerHesham ALMatary2015-02-101-2/+7
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* score: Delete superfluous Heap_Statistics::instanceSebastian Huber2015-01-222-8/+0
| | | | | This value depends on the _Heap_Initialize() call sequence and carries no useful information.
* powerpc: Fix AltiVec VSCR save/restoreSebastian Huber2015-01-203-10/+13
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* powerpc: AltiVec and FPU context supportSebastian Huber2015-01-135-8/+700
| | | | | | | | | | | Add AltiVec and FPU support to the Context_Control in case we use the e6500 multilib. Add PPC_MULTILIB_ALTIVEC and PPC_MULTILIB_FPU multilib defines. Add non-volatile AltiVec and FPU context to Context_Control. Add save/restore of non-volatile AltiVec and FPU to _CPU_Context_switch(). Add save/restore of volatile AltiVec and FPU context to the exception code. Adjust data cache optimizations for the new context and cache line size.
* nios2: Disable assembler warningSebastian Huber2015-01-131-2/+3
| | | | Close #2232.
* arm: Fix compile error for ARMv6-M multilibSebastian Huber2015-01-092-2/+5
| | | | | | | ARMv6-M is not supported since we cannot directly use the ARMv7-M code due to some inline assembler statements. Close #2231.
* powerpc: Add AltiVec register ASM definesSebastian Huber2015-01-091-0/+32
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* powerpc: Use PPC_HAS_FPUSebastian Huber2015-01-091-0/+2
| | | | Provide floating point context support only if PPC_HAS_FPU == 1.
* powerpc: Add PPC_STACK_ALIGN_POWERSebastian Huber2015-01-091-16/+6
| | | | Simplify PPC_STACK_ALIGNMENT definition.
* powerpc: Set PPC_DEFAULT_CACHE_LINE_SIZE for e6500Sebastian Huber2015-01-092-6/+12
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* powerpc: Use PPC_DEFAULT_CACHE_LINE_SIZESebastian Huber2015-01-092-3/+4
| | | | | Use it for the default PPC_CACHE_ALIGNMENT. Use it for PPC_STRUCTURE_ALIGNMENT.
* powerpc: Delete _CPU_IRQ_infoSebastian Huber2015-01-091-16/+0
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* powerpc: Use alternate time base for CPU counterSebastian Huber2015-01-091-3/+3
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* smp: Add and use _SMP_Should_start_processor()Sebastian Huber2015-01-092-3/+20
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* smp: Fix timeout for MrsP semaphoresSebastian Huber2014-12-182-60/+91
| | | | | | | | The previous timeout handling was flawed. In case a waiting thread helped out the owner could use the scheduler node indefinitely long. Update the resource tree in _MRSP_Timeout() to avoid this issue. Bug reported by Luca Bonato.
* sparc64: put each copyright on one lineGedare Bloom2014-12-085-16/+11
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* i386: doxygen and comments related to VESA real mode framebufferJan Dolezal2014-12-042-17/+26
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* SPARC: optimize IRQ enable & disableDaniel Hellstrom2014-12-041-2/+16
| | | | | | | | | | | | | | | | * Coding style cleanups. * Use OS reserved trap 0x89 for IRQ Disable * Use OS reserved trap 0x8A for IRQ Enable * Add to SPARC CPU supplement documentation This will result in faster Disable/Enable code since the system trap handler does not need to decode which function the user wants. Besides the IRQ disable/enabled can now be inline which avoids the caller to take into account that o0-o7+g1-g4 registers are destroyed by trap handler. It was also possible to reduce the interrupt trap handler by five instructions due to this.
* score: Add heap statisticsSebastian Huber2014-11-283-7/+31
| | | | | Add lifetime bytes allocated and freed since they were present in the malloc statistics. Add number of failed allocations.
* score: Return heap stats via _Heap_Get_informationSebastian Huber2014-11-282-1/+3
| | | | Print out heap statistics via the MALLOC and WKSPACE shell commands.
* smp: Fix scheduler helping protocolSebastian Huber2014-11-271-34/+77
| | | | | | | Ensure that scheduler nodes in the SCHEDULER_HELP_ACTIVE_OWNER or SCHEDULER_HELP_ACTIVE_RIVAL helping state are always SCHEDULER_SMP_NODE_READY or SCHEDULER_SMP_NODE_SCHEDULED to ensure the MrsP protocol properties.
* smp: Fix scheduler helping protocol assertionsSebastian Huber2014-11-271-3/+5
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* objectgetnameasstring.c: Reformat _Objects_Get() switch to follow patternJosh Oguin2014-11-261-7/+8
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* objectimpl.h: Add _Assert() to _Objects_Invalidate_Id()Josh Oguin2014-11-261-0/+6
| | | | | CodeSonar flagged this as a possible NULL deference. This should never occur but adding the _Assert() ensures we are guarding against that.
* chainimpl.h: Add _Assert() to _Chain_Initialize_empty()Josh Oguin2014-11-261-3/+9
| | | | | CodeSonar flagged this as a potential NULL deference. That should never occur but adding the _Assert() ensures we are checking that.
* apimutex.c: Add _Assert for NULL pointer accessJosh Oguin2014-11-261-0/+2
| | | | | | | CodeSonar detects a possible NULL deference here. But it should never occur in tested code. Memory for the API Mutexes is reserved by confdefs.h and are all preallocated when the class of objects is initialized. Allocating a single instance should never fail.
* arm: Use CPU_TIMESTAMP_USE_STRUCT_TIMESPECSebastian Huber2014-11-251-1/+1
| | | | | | | Converting 64-bit nanoseconds values into the common struct timeval or struct timespec formats requires a 64-bit division to get the seconds value. Performance analysis of high network loads revealed that this is too costly on ARM.
* _Scheduler_FIXME_thread_priority_queues_are_brokenSebastian Huber2014-11-242-13/+0
| | | | | Delete this variable since it is no longer necessary due to the thread priority queue implementation change to use RB trees.
* smp: Fix scheduler helping protocolLuca Bonato2014-11-242-18/+35
| | | | | | | | | | | | New test case for smptests/smpmrsp01. Fix _Scheduler_Block_node() in case the node is in the SCHEDULER_HELP_ACTIVE_RIVAL helping state. For example a rtems_task_suspend() on a task waiting for a MrsP semaphore. Fix _Scheduler_Unblock_node() in case the node is in the SCHEDULER_SMP_NODE_READY state. For example a rtems_task_resume() on a task owning or waiting for a MrsP semaphore.
* rtems/score/object.h: Correct types on _Objects_Build_idSantosh G Vattam2014-11-231-3/+3
| | | | close 1423
* objectsetname.c: Fix always true condition (Coverity ID 1063874)Joel Sherrill2014-11-211-5/+5
| | | | | Coverity spotted the comparison (0 <= length) which is always true. Changed logic to address this.
* cpukit: basedefs: macro for packed attributeJan Dolezal2014-11-201-0/+10
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* score: i386: functions converting real mode pointer to physical address and backJan Dolezal2014-11-202-0/+75
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* score: Move is_executing_on_a_core from cpuusagereport.c to threadimpl.hJennifer Averett2014-10-271-0/+30
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* score: Add capture data to tcb.Jennifer Averett2014-10-272-0/+10
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* cpukit/score/cpu/lm32/irq.c: Fix warningJoel Sherrill2014-10-201-0/+6
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* score/cpu/lm32/rtems/score/cpu.h: Fix set but not used warningJoel Sherrill2014-10-201-0/+3
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* score/cpu/i386/rtems/score/cpu.h: Fix set but not used warningJoel Sherrill2014-10-201-0/+1
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* bfin libcpu and libbsp: Fix warningsJoel Sherrill2014-10-161-0/+1
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* score: Fix compile error for POSIX disabledSebastian Huber2014-10-161-2/+1
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* h8300/cpu_asm.S: Correct register size suffix for loading DISPATCH_NEEDEDJoel Sherrill2014-10-151-1/+1
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* rtems/score/object.h: Include <rtems/score/cpu.h> to honor 16-bit IdsJoel Sherrill2014-10-151-0/+1
| | | | | | | Selection of 16-bit object Ids is a port specific decision. Somewhere along the way, the file providing this information was dropped from the include file set. This resulted in the code being compiled with a mix of 16 and 32 bit ID assumptions for those targets with 16-bit Ids.
* sparc64: fix warnings in cpukit/score/cpuGedare Bloom2014-10-132-4/+2
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* score/cpu/m32c: Fix warningsJoel Sherrill2014-10-132-4/+5
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* score: Rework global constructionSebastian Huber2014-10-134-82/+107
| | | | | | Ensure that the global construction is performed in the context of the first initialization thread. On SMP this was not guaranteed in the previous implementation.
* arm: Fix warningSebastian Huber2014-10-101-0/+6
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* m32r/cpu_asm.c: Add prototype to fix warningJoel Sherrill2014-10-091-0/+5
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* m32r/rtems/score/cpu.h: Fix macros to avoid warningsJoel Sherrill2014-10-091-18/+20
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* h8300/rtems/score/cpu.h: Fix macros to avoid warningsJoel Sherrill2014-10-091-6/+17
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* avr/rtems/score/cpu.h: Fix macros to avoid warningsJoel Sherrill2014-10-091-6/+5
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