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* 2001-08-09 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-08-094-29/+50
| | | | | | | | * include/rtems/score/coremsg.h, inline/rtems/score/coremsg.inl, src/coremsgsubmit.c: Unblocking message queue operations should NOT use _Thread_Executing for return status since it is permissible to invoke message send operations from an ISR. This was reported by Suvrat Gupta <suvrat@utstar.com>.
* 2001-07-03 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-07-032-1/+5
| | | | * cpu.c: Fixed typo.
* 2000-05-25 Sergei Organov <osv@javad.ru>Joel Sherrill2001-05-253-2/+6
| | | | | | * macros/rtems/score/coresem.inl, inline/rtems/score/coresem.inl: Cut and paste problem incorrectly enabled interrupts twice with the first time being too early.
* 2000-05-24 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-05-241-7/+38
| | | | | | | * rtems/score/mips.h: Added constants for MIPS exception numbers. All exceptions should be given low numbers and thus can be installed and processed in a uniform manner. Variances between various MIPS ISA levels were not accounted for.
* 2000-05-24 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-05-241-0/+7
| | | | | | | | * rtems/score/mips.h: Added constants for MIPS exception numbers. All exceptions should be given low numbers and thus can be installed and processed in a uniform manner. Variances between various MIPS ISA levels were not accounted for.
* 2001-05-24 Greg Menke <gregory.menke@gsfc.nasa.gov>Joel Sherrill2001-05-242-57/+157
| | | | | * Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>. * cpu_asm.S: Now works on Mongoose-V. Missed in previous patch.
* 2001-05-22 Greg Menke <gregory.menke@gsfc.nasa.gov>Joel Sherrill2001-05-223-21/+86
| | | | | | | | * rtems/score/cpu.h: Add the interrupt stack structure and enhance the context initialization to account for floating point tasks. * rtems/score/mips.h: Added the routines mips_set_cause(), mips_get_fcr31(), and mips_set_fcr31(). * Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>.
* 2001-05-09 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2001-05-092-0/+9
| | | | | * include/rtems/score/.cvsignore: Add stamp-h, cpuopts.h, cpuopts.h.in, cpuopts-tmp.h.
* 2001-05-07 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2001-05-082-2/+4
| | | | * rtems/score/cpu.h: Remove #undef __STRICT_ANSI__.
* 2001-05-07 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-05-072-67/+95
| | | | | | * cpu_asm.S: Merged patches from Gregory Menke <Gregory.D.Menke.1@gsfc.nasa.gov> that clean up stack usage and include nops in the delay slots.
* 2001-04-20 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-04-202-0/+15
| | | | | | * cpu_asm.S: Added code to save and restore SR and EPC to properly support nested interrupts. Note that the ISR (not RTEMS) enables interrupts allowing the nesting to occur.
* 2001-04-11 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-04-112-2/+4
| | | | * cpu.c: Removed duplicate declaration for _ISR_Vector_table.
* 2001-03-14 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-03-145-79/+57
| | | | | | * cpu.c, rtems/score/cpu.h, rtems/score/mipstypes.h: Removed unused variable _CPU_Thread_dispatch_pointer and cleaned numerous comments.
* 2001-03-13 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-03-147-722/+408
| | | | | | | * cpu.c, cpu_asm.S, iregdef.h, rtems/score/cpu.h, rtems/score/mips.h: Merged MIPS1 and MIPS3 code reducing the number of lines of assembly. Also reimplemented some assembly routines in C further reducing the amount of assembly and increasing maintainability.
* 2001-02-04 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2001-02-0532-57/+128
| | | | | * Makefile.am, rtems/score/Makefile.am: Apply include_*HEADERS instead of H_FILES.
* 2001-02-03 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2001-02-051-0/+6
| | | | | | * include/rtems/Makefile.am, include/rtems/score/Makefile.am, inline/rtems/score/Makefile.am, macros/rtems/score/Makefile.am Apply include_*HEADERS instead of H_FILES.
* 2001-01-29 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-292-0/+7
| | | | | * src/objectextendinformation.c: Added include of string.h to eliminate warning.
* 2001-01-25 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-253-6/+16
| | | | | | * cpu.c, rtems/score/cpu.h: Bug report from Peter Mueller <peter.o.mueller@gmx.de> because of not correcting for the ISR vector table now being allocated from the workspace.
* 2001-01-12 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-122-2/+7
| | | | | * rtems/score/mips.h (mips_get_sr, mips_set_sr): Corrected register constraints from "general" to "register".
* 2001-01-09 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-094-6/+27
| | | | | * cpu_asm.S: Use SR_INTERRUPT_ENABLE_BITS instead of SR_XXX constants to make it easier to conditionalize the code for various ISA levels.
* 2001-01-08 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-082-0/+9
| | | | | * src/threadinitialize.c: Fix my bad hack of Ralf's fp_area warning removal patch. :(
* 2001-01-08 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2001-01-082-0/+6
| | | | * src/threadinitialize.c: Removed warning.
* 2001-01-08 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-085-3/+18
| | | | | | | | * idtcpu.h: Commented out definition of "wait". It was stupid to use such a common word as a macro. * rtems/score/cpu.h (_CPU_ISR_Disable): Fixed for mips ISA 3. * rtems/score/mips.h: Added include of <idtcpu.h>. * rtems/score/mips.h (mips_enable_in_interrupt_mask): Corrected.
* 2001-01-03 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-0314-6/+99
| | | | * rtems/score/cpu.h: Added _CPU_Initialize_vectors().
* 2001-01-03 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-0312-7/+61
| | | | | | * rtems/score/cpu.h: Added _CPU_Initialize_vectors(). * cpu_asm.S: Modify to properly dereference _ISR_Vector_table now that it is dynamically allocated.
* 2001-01-03 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-033-7/+20
| | | | | * rtems/score/cpu.h: Added _CPU_Initialize_vectors(). * cpu_asm.S: Eliminated warning for duplicate definition of EXTERN.
* 2001-01-03 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-033-3/+13
| | | | | | | * rtems/score/cpu.h: Added _CPU_Initialize_vectors(). * cpu_asm.S: Modify to properly dereference _ISR_Vector_table now that it is dynamically allocated.
* 2001-01-03 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-031-4/+0
| | | | * ChangeLog: Removed duplicate entry.
* 2001-01-03 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-032-0/+7
| | | | * rtems/score/cpu.h: Added _CPU_Initialize_vectors().
* 2001-01-03 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-035-0/+25
| | | | * rtems/score/cpu.h: Added _CPU_Initialize_vectors().
* 2001-01-03 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-032-0/+10
| | | | * rtems/score/cpu.h: Added _CPU_Initialize_vectors().
* 2000-12-19 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-12-192-4/+9
| | | | | * src/isr.c: Allocate the _ISR_Vector_table all the time not just when we are allocating an interrupt stack.
* 2000-12-19 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-12-192-1/+9
| | | | | | * cpu_asm.S (_ISR_Handler): Return to the address in the EPC register. Previous code resulting in the interrupted immediately returning to the caller of the routine it was inside.
* 2000-12-19 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-12-192-11/+5
| | | | | * cpu.c (_CPU_Initialize): Do not initialize _ISR_Vector_table() here because it has not been allocated yet.
* 2000-12-19 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-12-192-1/+8
| | | | | | * cpu.c: Do not read or write raw interrupt vector table if we are on a CPU that does not have a %vbr register and the BSP is configured as having the table in ROM.
* 2000-12-13 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-12-133-1/+11
| | | | | | * include/rtems/score/isr.h, src/isr.c: Allocate it from the workspace rather than explicitly declaring it. This allows the size to be a non-constant from the perspective of score/cpu.
* 2000-12-13 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-12-134-82/+16
| | | | | | | | * cpu.c: Removed duplicate declaration for _ISR_Vector_table. * cpu_asm.S: Removed assembly language to vector ISR handler on MIPS ISA I. Now call mips_vector_isr_handlers() in libcpu or BSP. * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): No longer a constant -- get the real value from libcpu.
* 2000-12-13 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-12-1312-525/+322
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * cpu_asm.h: Removed. * Makefile.am: Remove cpu_asm.h. * rtems/score/mips64orion.h: Renamed mips.h. * rtems/score/mips.h: New file, formerly mips64orion.h. Header rewritten. (mips_get_sr, mips_set_sr, mips_enable_in_interrupt_mask, mips_disable_in_interrupt_mask): New macros. * rtems/score/Makefile.am: Reflect renaming mips64orion.h. * asm.h: Include <mips.h> not <mips64orion.h>. Now includes the few defines that were in <cpu_asm.h>. * cpu.c (_CPU_ISR_Get_level): Added MIPS ISA I version of this routine. MIPS ISA 3 is still in assembly for now. (_CPU_Thread_Idle_body): Rewrote in C. * cpu_asm.S: Rewrote file header. (FRAME,ENDFRAME) now in asm.h. (_CPU_ISR_Get_level): Removed ISA I version and rewrote in C. (_CPU_ISR_Set_level): Removed ISA I version and rewrote in C. (_CPU_Context_switch): MIPS ISA I now manages preserves SR_IEC and leaves other bits in SR alone on task switch. (mips_enable_interrupts,mips_disable_interrupts, mips_enable_global_interrupts,mips_disable_global_interrupts, disable_int, enable_int): Removed. (mips_get_sr): Rewritten as C macro. (_CPU_Thread_Idle_body): Rewritten in C. (init_exc_vecs): Rewritten in C as mips_install_isr_entries() and placed in libcpu. (exc_tlb_code, exc_xtlb_code, exc_cache_code, exc_norm_code): Moved to libcpu/mips/shared/interrupts. (general): Cleaned up comment blocks and #if 0 areas. * idtcpu.h: Made ifdef report an error. * iregdef.h: Removed warning. * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): Now a variable number defined by libcpu. (_CPU_ISR_Disable, _CPU_ISR_Enable): Rewritten to use new routines to access SR. (_CPU_ISR_Set_level): Rewritten as macro for ISA I. (_CPU_Context_Initialize): Honor ISR level in task initialization. (_CPU_Fatal_halt): Use new _CPU_ISR_Disable() macro.
* 2000-12-06 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-12-062-0/+5
| | | | * cpu.c: Added include of <rtems/rtems/cache.h> to eliminate warning.
* 2000-12-06 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-12-062-0/+21
| | | | | * rtems/score/cpu.h: When mips ISA level is 1, registers in the context should be 32 not 64 bits.
* 2000-12-01 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-12-013-15/+21
| | | | | | | | * macros/rtems/score/coresem.inl: Removed comments since convention calls for comments to be in inline versin. * macros/rtems/score/object.inl (Objects_Get_local_object): Fixed style to use _ prefix on variable names and use parentheses. * macros/rtems/score/object.inl (_Objects_Namespace_remove): Added.
* 2000-11-30 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-11-307-4/+143
| | | | | | | | | | | | | | | | | | * General effort to make things compile with macros not inlines * inline/rtems/score/coremutex.inl: Added comment indicating for macros there is another copy of _CORE_mutex_Seize_interrupt_trylock() in src/coremutexseize.c. * src/coremutexseize.c: Added body of _CORE_mutex_Seize_interrupt_trylock() for macro case. * macros/rtems/score/coremutex.inl: Added prototype for _CORE_mutex_Seize_interrupt_trylock() since there is a real body when macros are enabled. * macros/rtems/score/coresem.inl: Added macro implementation of _CORE_semaphore_Seize_isr_disable. * macros/score/Makefile.am: Fixed typos. * rtems/score/address.inl: Correct macro implementation of _Addresses_Is_aligned() so it would compile. * macros/rtems/score/coremsg.inl: Added closing parentheses.
* 2000-11-30 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-11-302-2/+14
| | | | | | * cpu_asm.S: Changed "_CPU_Ccontext_switch_restore: typo to correct name of _CPU_Context_switch_restore. Added dummy version of exc_utlb_code() so applications would link.
* 2000-11-28 Chris Johns <ccj@acm.org>Joel Sherrill2000-11-282-1/+18
| | | | | | | | | * src/heapallocate.c: Do not allow the size to overflow when adjusting it. A test allocated a stack of -1 (~0). This actually resulted in a stack being allocated but with a size of 0xb. The allocator did not test the size to see if it rolled through 0 and so allowed the allocation to happen, the thread to get created. The task crashed as you would expect.
* 2000-11-21 Jiri Gaisler <jgais@ws.estec.esa.nl>Joel Sherrill2000-11-212-3/+14
| | | | * cpu_asm.S: Fix for CPUs with FPU revision B or C.
* 2000-11-14 Jiri Gaisler <jgais@ws.estec.esa.nl>Joel Sherrill2000-11-153-1/+20
| | | | | | * cpu.c, rtems/cpu/sparc.h: Make floating point optional based on gcc arguments. Do not initialize FP context if there is no FPU. Flush instruction cache after installing RTEMS trap handler.
* 2000-11-09 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-11-0934-17/+85
| | | | * Makefile.am: Use ... instead of RTEMS_TOPdir in ACLOCAL_AMFLAGS.
* 2000-11-02 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-11-032-1/+7
| | | | | | * include/rtems/system.h: Use proper conditional (RTEMS_POSIX_API) so prototypes for POSIX_MP_NOT_IMPLEMENTED(), POSIX_NOT_IMPLEMENTED(), POSIX_BOTTOM_REACHED() are actually included.
* 2000-11-02 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-11-022-1/+16
| | | | | | * aclocal/canonicalize-tools.m4, aclocal/check-tool.m4, aclocal/prog-cc.m4, aclocal/prog-cxx.m4: Replace AC_CHECK_TOOL with an RTEMS specific but more restrictive autoconf macro.
* 2000-11-02 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-11-0234-17/+85
| | | | * Makefile.am: Switch to ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal.
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