| Commit message (Collapse) | Author | Age | Files | Lines |
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Rename _Per_CPU_Lock_acquire() to _Per_CPU_ISR_disable_and_acquire().
Rename _Per_CPU_Lock_release() to _Per_CPU_Release_and_ISR_enable().
Add _Per_CPU_Acquire() and _Per_CPU_Release().
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Add context parameter to _Thread_Start_multitasking() and use this
function in rtems_smp_secondary_cpu_initialize(). This avoids
duplication of code.
Fix missing floating point context initialization in
rtems_smp_secondary_cpu_initialize(). Now performed via
_Thread_Start_multitasking().
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Use an event triggered unicast to inform remote processors about a
necessary thread dispatch instead.
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Delete _ISR_Enable_on_this_core(), _ISR_Flash_on_this_core(),
_ISR_SMP_Disable(), _ISR_SMP_Enable(), _ISR_SMP_Flash().
The ISR disable/enable interface has no parameter to pass a specific
object. Thus it is only possible to implement a single global lock
object with this interface. Using the ISR disable/enable as the giant
lock on SMP configurations is not feasible.
Potentially blocking resource obtain sequences protected by the thread
dispatch disable level are subdivided into smaller ISR disabled critical
sections. This works since on single processor configurations there is
only one thread of execution that can block. On SMP this is different
(image a mutex obtained concurrently by different threads on different
processors).
The thread dispatch disable level is currently used as the giant lock.
There is not need to complicate things with this unused interface.
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Add and use _Per_CPU_Get_by_index() and _Per_CPU_Get_index(). Add
_Per_CPU_Send_interrupt(). This avoids direct access of
_Per_CPU_Information.
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Move implementation specific parts of thread.h and thread.inl into new
header file threadimpl.h. The thread.h contains now only the
application visible API.
Remove superfluous header file includes from various files.
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Delete bsp_smp_interrupt_cpu().
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Add and use _SMP_Get_current_processor() and
rtems_smp_get_current_processor().
Delete bsp_smp_interrupt_cpu().
Change type of current processor index from int to uint32_t to match
_SMP_Processor_count type.
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The thread dispatch is a side-effect of interrupt processing, thus there
is no need to send an explicit message.
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The new Simple SMP Scheduler allocates a processor for the processor
count highest priority ready threads. The thread priority and position
in the ready chain are the only information to determine the scheduling
decision. Threads with an allocated processor are in the scheduled
chain. After initialization the scheduled chain has exactly processor
count nodes. Each processor has exactly one allocated thread after
initialization. All enqueue and extract operations may exchange threads
with the scheduled chain. One thread will be added and another will be
removed. The scheduled and ready chain is ordered according to the
thread priority order. The chain insert operations are O(count of ready
threads), thus this scheduler is unsuitable for most real-time
applications.
The thread preempt mode will be ignored.
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Rename in rtems_smp_get_processor_count(). Always provide
<rtems/score/smp.h> and <rtems/rtems/smp.h>. Add
_SMP_Get_processor_count(). This function will be a compile time
constant defined to be one on uni-processor configurations. This allows
iterations over all processors without overhead on uni-processor
configurations.
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Add and use _Per_CPU_Lock_release().
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Move thread dispatch declarations and inline functions to new header
<rtems/score/threaddispatch.h> to make it independent of the
Thread_Control structure. This avoids a cyclic dependency in case
thread dispatch functions are used for the object implementation.
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Move the SMP lock implementation to the CPU port. An optimal SMP lock
implementation is highly architecture dependent. For example the memory
models may be fundamentally different.
The new SMP lock API has a flaw. It does not provide the ability to use
a local context for acquire and release pairs. Such a context is
necessary to implement for example the Mellor-Crummey and Scott (MCS)
locks. The SMP lock is currently used in _Thread_Disable_dispatch() and
_Thread_Enable_dispatch() and makes them to a giant lock acquire and
release. Since these functions do not pass state information via a
local context there is currently no use case for such a feature.
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Delete bsp_smp_wait_for(). Other parts of the system work without
timeout, e.g. the spinlocks. Using a timeout here does not make the
system more robust.
Delete bsp_smp_cpu_state and replace it with Per_CPU_State. The
Per_CPU_State follows the Score naming conventions. Add
_Per_CPU_Change_state() and _Per_CPU_Wait_for_state() functions to
change and observe states.
Use Per_CPU_State in Per_CPU_Control instead of the anonymous integer.
Add _CPU_Processor_event_broadcast() and _CPU_Processor_event_receive()
functions provided by the CPU port. Use these functions in
_Per_CPU_Change_state() and _Per_CPU_Wait_for_state().
Add prototype for _SMP_Send_message().
Delete RTEMS_BSP_SMP_FIRST_TASK message. The first context switch is
now performed in rtems_smp_secondary_cpu_initialize(). Issuing the
first context switch in the context of the inter-processor interrupt is
not possible on systems with a modern interrupt controller. Such an
interrupt controler usually requires a handshake protocol with interrupt
acknowledge and end of interrupt signals. A direct context switch in an
interrupt handler circumvents the interrupt processing epilogue and may
leave the system in an inconsistent state.
Release lock in rtems_smp_process_interrupt() even if no message was
delivered. This prevents deadlock of the system.
Simplify and format _SMP_Send_message(),
_SMP_Request_other_cores_to_perform_first_context_switch(),
_SMP_Request_other_cores_to_dispatch() and
_SMP_Request_other_cores_to_shutdown().
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Do not call bsp_smp_secondary_cpu_initialize() in
rtems_smp_secondary_cpu_initialize(). This allows more flexibilty in
the BSP low-level code. Specify context requirements for a call to
rtems_smp_secondary_cpu_initialize().
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Script does what is expected and tries to do it as
smartly as possible.
+ remove occurrences of two blank comment lines
next to each other after Id string line removed.
+ remove entire comment blocks which only exited to
contain CVS Ids
+ If the processing left a blank line at the top of
a file, it was removed.
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PR 1876
* score/Makefile.am, score/include/rtems/score/isr.h, score/src/isr.c,
score/src/smp.c, score/src/smplock.c, score/src/threaddispatch.c,
score/src/threaddispatchdisablelevel.c: Add smp isr support.
* score/src/isrsmp.c: New file.
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* score/src/smp.c: Spinlock Name change necessary to resolve
compalation error.
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* score/src/smp.c: Fix typo so this compiles.
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PR 1796/cpukit
* sapi/src/exshutdown.c, score/include/rtems/score/percpu.h,
score/include/rtems/score/smp.h, score/src/smp.c,
score/src/threaddispatch.c, score/src/threadhandler.c: Added SMP
interprocess communications.
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PR 1787/cpukit
* score/include/rtems/score/percpu.h,
score/include/rtems/score/smplock.h, score/src/smp.c,
score/src/smplock.c: Add nesting support to smp spinlock.
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PR 1784
* sapi/src/exinit.c, score/Makefile.am, score/preinstall.am,
score/include/rtems/bspsmp.h, score/src/percpu.c, score/src/smp.c,
score/src/threadcreateidle.c: Split bspsmp.h into two files smp.h and
bspsmp.h
* score/include/rtems/score/smp.h: New file.
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PR 1777/cpukit
* libcsupport/src/malloc_deferred.c, libcsupport/src/realloc.c,
score/Makefile.am, score/cpu/lm32/irq.c, score/cpu/nios2/irq.c,
score/include/rtems/score/coremutex.h,
score/include/rtems/score/thread.h,
score/inline/rtems/score/thread.inl, score/src/heapfree.c,
score/src/pheapwalk.c, score/src/smp.c, score/src/threaddispatch.c:
Consolidated access to _Thread_Dispatch_disable_level.
* score/src/threaddisabledispatch.c, score/src/threadenabledispatch.c:
New files.
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PR 1729/cpukit
* configure.ac, sapi/include/confdefs.h, sapi/src/exinit.c,
score/Makefile.am, score/preinstall.am,
score/cpu/i386/rtems/score/cpu.h, score/cpu/sparc/cpu_asm.S,
score/cpu/sparc/rtems/score/cpu.h,
score/include/rtems/score/basedefs.h,
score/include/rtems/score/context.h,
score/include/rtems/score/percpu.h, score/src/percpu.c,
score/src/thread.c, score/src/threadcreateidle.c: Add next step in
SMP support. This adds an allocated array of the Per_CPU structures
to support multiple cpus vs a single instance of the structure which
is still used if SMP support is disabled. Configuration support is
also added to explicitly enable or disable SMP. But SMP can only be
enabled for the CPUs which will support it initially -- SPARC and
i386. With the stub BSP support, a BSP can be run as a single core
SMP system from an RTEMS data structure standpoint.
* aclocal/check-smp.m4, aclocal/enable-smp.m4,
score/include/rtems/bspsmp.h, score/include/rtems/score/smplock.h,
score/src/smp.c, score/src/smplock.c: New files.
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