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authorSebastian Huber <sebastian.huber@embedded-brains.de>2013-05-28 10:54:46 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2013-05-31 15:20:32 +0200
commite358088fc25fb3f62b30ae6a187f3e374f6a5ed7 (patch)
tree554337534e7212617c1523be0453c604ad120916 /cpukit/score/src/smp.c
parentscore: Mark as no return (diff)
downloadrtems-e358088fc25fb3f62b30ae6a187f3e374f6a5ed7.tar.bz2
smp: New SMP lock API
Move the SMP lock implementation to the CPU port. An optimal SMP lock implementation is highly architecture dependent. For example the memory models may be fundamentally different. The new SMP lock API has a flaw. It does not provide the ability to use a local context for acquire and release pairs. Such a context is necessary to implement for example the Mellor-Crummey and Scott (MCS) locks. The SMP lock is currently used in _Thread_Disable_dispatch() and _Thread_Enable_dispatch() and makes them to a giant lock acquire and release. Since these functions do not pass state information via a local context there is currently no use case for such a feature.
Diffstat (limited to 'cpukit/score/src/smp.c')
-rw-r--r--cpukit/score/src/smp.c14
1 files changed, 8 insertions, 6 deletions
diff --git a/cpukit/score/src/smp.c b/cpukit/score/src/smp.c
index 69f5337b75..6f1bc55cc8 100644
--- a/cpukit/score/src/smp.c
+++ b/cpukit/score/src/smp.c
@@ -69,10 +69,10 @@ void rtems_smp_process_interrupt( void )
ISR_Level level;
- level = _SMP_lock_spinlock_simple_Obtain( &per_cpu->lock );
+ _SMP_lock_ISR_disable_and_acquire( &per_cpu->lock, level );
message = per_cpu->message;
per_cpu->message = 0;
- _SMP_lock_spinlock_simple_Release( &per_cpu->lock, level );
+ _SMP_lock_Release_and_ISR_enable( &per_cpu->lock, level );
#if defined(RTEMS_DEBUG)
{
@@ -115,9 +115,9 @@ void _SMP_Send_message( int cpu, uint32_t message )
printk( "Send 0x%x to %d\n", message, cpu );
#endif
- level = _SMP_lock_spinlock_simple_Obtain( &per_cpu->lock );
+ _SMP_lock_ISR_disable_and_acquire( &per_cpu->lock, level );
per_cpu->message |= message;
- _SMP_lock_spinlock_simple_Release( &per_cpu->lock, level );
+ _SMP_lock_Release_and_ISR_enable( &per_cpu->lock, level );
bsp_smp_interrupt_cpu( cpu );
}
@@ -131,9 +131,11 @@ void _SMP_Broadcast_message( uint32_t message )
for ( cpu = 0 ; cpu < ncpus ; ++cpu ) {
if ( cpu != self ) {
Per_CPU_Control *per_cpu = &_Per_CPU_Information[ cpu ];
- ISR_Level level = _SMP_lock_spinlock_simple_Obtain( &per_cpu->lock );
+ ISR_Level level;
+
+ _SMP_lock_ISR_disable_and_acquire( &per_cpu->lock, level );
per_cpu->message |= message;
- _SMP_lock_spinlock_simple_Release( &per_cpu->lock, level );
+ _SMP_lock_Release_and_ISR_enable( &per_cpu->lock, level );
}
}