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* Remove CVS-Ids.Ralf Corsépius2012-05-0417-67/+0
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* no_cpu: replace no_cpu_isr with rtems_isrGedare Bloom2012-04-161-6/+0
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* lm32: replace lm32_isr with rtems_isrGedare Bloom2012-04-161-6/+0
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* m68k: replace m68k_isr with rtems_isrGedare Bloom2012-04-161-2/+0
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* nios2: New functionsSebastian Huber2012-04-112-0/+49
| | | | | | Add o _Nios2_MPU_Get_region_descriptor(), and o _Nios2_MPU_Set_region_registers().
* nios2: API changeSebastian Huber2012-04-113-4/+4
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* arm: New functionSebastian Huber2012-04-074-4/+46
| | | | | Add and use function _ARMV7M_Set_exception_priority_and_handler(). Use ARMV7M_EXCEPTION_PRIORITY_LOWEST define.
* PR 1993 - Convert MIPS to PIC IRQ modelJennifer Averett2012-04-043-77/+34
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* Add Virtex4 and Virtex5 BSPsRic Claus2012-03-301-1/+78
| | | | | | | | | | | | | | | | | This commit covers at least PR2020, 2022, and 2023. This patch adds all of the code for both BSPs, modifications to libcpu/powerpc for the ppc440, and some updates to the BSPs from follow up review and testing. These BSPs should be good baselines for future development. The configurations used by Ric are custom and have a non-standard NIC. They also do not have a UART. Thus the current console driver just prints to a RAM buffer. The NIC and UART support are left for future work. When the UART support is added, moving the existing "to RAM" console driver to a shared location is likely desirable because boards with no debug UART port are commonly deployed. This would let printk() go to RAM.
* NIOS2: Add MPU support functionsSebastian Huber2012-03-304-21/+165
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* NIOS2: Fix outermost interrupt checkSebastian Huber2012-03-301-1/+4
| | | | | This fix is critical. The previous implementation leads to system corruption.
* ARM: PR2042: Provide stub for ARMv6-MSebastian Huber2012-03-272-8/+9
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* ARM: New define ARMV7M_EXCEPTION_PRIORITY_LOWESTSebastian Huber2012-03-241-0/+2
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* PR2041: sparc64: vector number not included in CPU_Interrupt_frameGedare Bloom2012-03-141-1/+2
| | | | | Add the trap vector to the interrupt frame. Also rename the assembly macro that accesses the field to be consistent with similar macros.
* Support Thumb 2.Sebastian Huber2012-02-111-1/+4
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* ARMv7-M NVIC and MPU API changes.Sebastian Huber2012-02-113-12/+248
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* ARMv7-M Systick API changeSebastian Huber2012-02-111-1/+1
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* Remove all .cvsignore files.Joel Sherrill2012-02-0117-34/+0
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* 2011-12-09 Ralf Corsépius <ralf.corsepius@rtems.org>Ralf Corsepius2011-12-092-1/+5
| | | | * cpu.c: Make _defaultExcHandler static.
* 2011-12-09 Jennifer AverettJennifer Averett2011-12-092-1/+5
| | | | * cpu.c: Correct typo.
* 2011-12-06 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-12-062-0/+39
| | | | * rtems/powerpc/registers.h: More register defines.
* 2011-11-28 Werner Almesberger <werner@almesberger.net>Joel Sherrill2011-11-282-24/+17
| | | | | | PR 1956/cpukit * rtems/score/cpu.h: Correct multiple alignment constants. Improve comments.
* Typo.Sebastian Huber2011-11-201-1/+1
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* 2011-11-07 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-11-192-0/+7
| | | | | | PR 1965/cpukit * rtems/score/arm.h: Select ARMv4 multilib implementation for __ARM_ARCH_7A__.
* Move entries to correct file.Joel Sherrill2011-11-091-0/+12
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* 2011-11-09 Werner Almesberger <werner@almesberger.net>Joel Sherrill2011-11-091-3/+3
| | | | | PR 1954/cpukit * score/cpu/lm32/rtems/score/lm32.h: Protect against macro expansion.
* 2011-11-09 Werner Almesberger <werner@almesberger.net>Joel Sherrill2011-11-092-2/+9
| | | | | PR 1955/cpukit * rtems/score/cpu.h: Convert CPU_swap_u16 into a static inline.
* 2011-11-07 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-11-072-1/+4
| | | | * rtems/score/cpu.h: Removed unused register_pc from Context_Control.
* 2011-11-07 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-11-072-0/+8
| | | | | | | PR 1949/cpukit PR 1950/cpukit * rtems/score/arm.h: Select ARMv4 multilib implementation for __ARM_ARCH_6J__.
* 2011-10-21 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-10-218-2/+409
| | | | | | | | * nios2-mpu-configuration.c, nios2-mpu-descriptor.c, nios2-mpu-disable-protected.c, nios2-mpu-reset.c: New files. * Makefile.am: Reflect changes above. * rtems/score/nios2-utility.h, nios2-context-initialize.c: Added support for the memory protection unit (MPU).
* 2011-10-07 Daniel Hellstrom <daniel@gaisler.com>Joel Sherrill2011-10-072-11/+23
| | | | | | | | | | | | | PR 1932/cpukit * cpu_asm.S: At some point the interrupt trap handler causes a window-overflow and the window overflow trap handler crashes when writing to 0. I found that this is because the WIM was bad, to the window overflow handler uses a uninitialized stack pointer in a window never used. * g3=CWP, not WIM * CWP is incremented by done_flushing no need doing that here also * I see no reason to create an additional stack frame (save) * Must turn off traps when updating WIM (maybe already done by caller?)
* 2011-10-06 Gedare Bloom <giddyup44@yahoo.com>Joel Sherrill2011-10-062-0/+8
| | | | | PR 1918/cpukit * cpu.c: Initialize context with cleared g4 register.
* 2011-09-30 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-09-302-4/+7
| | | | | * nios2-context-switch.S: Use small-data area access for _Per_CPU_Information fields.
* 2011-09-27 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-09-2728-0/+97
| | | | | PR 1914/cpukit * rtems/score/cpu.h: Select timestamp implementation.
* Typo.Sebastian Huber2011-09-271-1/+1
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* 2011-09-28 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-09-272-0/+7
| | | | | PR 1914/cpukit * rtems/score/cpu.h: Select timestamp implementation.
* 2011-09-24 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-09-2426-28/+1015
| | | | | | | | | | | | | | | | | | * rtems/score/armv7m.h, armv7m-context-initialize.c, armv7m-context-restore.c, armv7m-context-switch.c, armv7m-exception-handler-get.c, armv7m-exception-handler-set.c, armv7m-exception-priority-get.c, armv7m-exception-priority-set.c, armv7m-initialize.c, armv7m-isr-dispatch.c, armv7m-isr-enter-leave.c, armv7m-isr-level-get.c, armv7m-isr-level-set.c, armv7m-isr-vector-install.c, armv7m-multitasking-start-stop.c: New files. * Makefile.am, preinstall.am: Reflect changes above. * rtems/score/arm.h: Define ARM_MULTILIB_ARCH_V4 and ARM_MULTILIB_ARCH_V7M. * rtems/score/cpu.h, cpu_asm.S, cpu.c, arm_exc_abort.S, arm_exc_handler_high.c, arm_exc_handler_low.S, arm_exc_interrupt.S: Define CPU_HAS_HARDWARE_INTERRUPT_STACK to FALSE. Use ARM_MULTILIB_ARCH_V4 and ARM_MULTILIB_ARCH_V7M.
* 2011-09-22 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-09-222-0/+76
| | | | | | PR 1914/cpukit * rtems/score/cpu.h: Document CPU_TIMESTAMP_USE_STRUCT_TIMESPEC, CPU_TIMESTAMP_USE_INT64, and CPU_TIMESTAMP_USE_INT64_INLINE.
* 2011-09-16 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-09-168-4/+401
| | | | | | | | * nios2-eic-il-low-level.S, nios2-eic-rsie-low-level.S: New files. * Makefile.am: Reflect changes above. * rtems/score/cpu.h, rtems/score/nios2-utility.h, nios2-thread-dispatch-disabled.c, nios2-context-switch.S: Added support for thread stack protection via the MPU.
* 2011-09-16 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-09-162-0/+13
| | | | * rtems/score/arm.h: More CPU_MODEL_NAME variants.
* 2011-09-14 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-09-142-4/+6
| | | | | * rtems/score/cpu.h: Request cache alignment and small data area in CPU_STRUCTURE_ALIGNMENT.
* 2011-09-09 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-09-092-2/+6
| | | | | * nios2-thread-dispatch-disabled.c: Use offsetof() instead of RTEMS_offsetof().
* 2011-09-02 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-09-024-5/+10
| | | | | * rtems/score/nios2-utility.h, nios2-isr-set-level.c, nios2-isr-get-level.c: Renamed functions.
* 2011-09-02 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-09-022-12/+9
| | | | | * rtems/score/nios2-utility.h: Use the same values for defines used by Altera HAL.
* 2011-09-02 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-09-024-13/+48
| | | | | | | * rtems/score/nios2-utility.h: Avoid redefines with Altera HAL. Declare _Nios2_ISR_Set_level(). * nios2-context-initialize.c: Use _Nios2_ISR_Set_level(). * nios2-isr-set-level.c: Define _Nios2_ISR_Set_level().
* 2011-09-01 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-09-0119-304/+908
| | | | | | | | | | | | | | | | * cpu.c, cpu_asm.S: Removed files. * nios2-context-initialize.c, nios2-context-switch.S, nios2-fatal-halt.c, nios2-initialize-vectors.c, nios2-initialize.c, nios2-isr-get-level.c, nios2-isr-install-raw-handler.c, nios2-isr-install-vector.c, nios2-isr-is-in-progress.c, nios2-isr-set-level.c, nios2-thread-dispatch-disabled.c, rtems/score/nios2-utility.h: New files. * Makefile.am, preinstall.am: Reflect changes above. * irq.c: Update due to API changes. * rtems/score/cpu.h: New functions _CPU_Initialize_vectors(), _CPU_ISR_Set_level(), and _CPU_Fatal_halt() (instead of macros). Support for external interrupt controller (EIC). Documentation changes.
* 2011-08-30 Peter Dufault <dufault@hda.com>Sebastian Huber2011-08-302-0/+33
| | | | | * rtems/score/cpu.h: Add more context access functionality. Needed to get GDB debugger hooks working.
* 2011-08-24 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-08-242-8/+14
| | | | | | * rtems/powerpc/registers.h: Renamed defines XER in PPC_XER, LR in PPC_LR, CTR in PPC_CTR, PVR in PPC_PVR, RPA in PPC_RPA, DAR in PPC_DAR, DEC in PPC_DEC, and EAR in PPC_EAR.
* 2011-08-18 Chris Johns <chrisj@rtems.org>Chris Johns2011-08-186-52/+119
| | | | | | | | | | | | * cpu.c: Fix the ISR get level for the IIC. Make _CPU_Context_Initialize a function rather than inlined. * cpu_asm.S: Do not enable interrupt on return, rather resume the state on entry to the ISR. * irq.c, nios2/nios2-iic-low-level.S: Change the ISR handler so the ipending decoding is in C and within the interrupt context. This is usable with the Altera HAL directly. * rtems/score/cpu.h: Add ienable and ipending interfaces. Add some comments. Remove _CPU_Context_Initialize.
* 2011-08-18 Sebastien Bourdeauducq <sebastien.bourdeauducq@gmail.com>Sebastian Huber2011-08-182-2/+6
| | | | | PR 1868/lm32 * irq.c: Bugfix.
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