| Commit message (Collapse) | Author | Age | Files | Lines |
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* cpu.c, rtems/score/cpu.h: Bug report from Peter Mueller
<peter.o.mueller@gmx.de> because of not correcting for the ISR
vector table now being allocated from the workspace.
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* rtems/score/mips.h (mips_get_sr, mips_set_sr): Corrected
register constraints from "general" to "register".
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* cpu_asm.S: Use SR_INTERRUPT_ENABLE_BITS instead of SR_XXX constants
to make it easier to conditionalize the code for various ISA levels.
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* idtcpu.h: Commented out definition of "wait". It was stupid to
use such a common word as a macro.
* rtems/score/cpu.h (_CPU_ISR_Disable): Fixed for mips ISA 3.
* rtems/score/mips.h: Added include of <idtcpu.h>.
* rtems/score/mips.h (mips_enable_in_interrupt_mask): Corrected.
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* rtems/score/cpu.h: Added _CPU_Initialize_vectors().
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* rtems/score/cpu.h: Added _CPU_Initialize_vectors().
* cpu_asm.S: Modify to properly dereference _ISR_Vector_table
now that it is dynamically allocated.
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* rtems/score/cpu.h: Added _CPU_Initialize_vectors().
* cpu_asm.S: Eliminated warning for duplicate definition of EXTERN.
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* rtems/score/cpu.h: Added _CPU_Initialize_vectors().
* cpu_asm.S: Modify to properly dereference _ISR_Vector_table
now that it is dynamically allocated.
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* ChangeLog: Removed duplicate entry.
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* rtems/score/cpu.h: Added _CPU_Initialize_vectors().
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* rtems/score/cpu.h: Added _CPU_Initialize_vectors().
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* rtems/score/cpu.h: Added _CPU_Initialize_vectors().
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* cpu_asm.S (_ISR_Handler): Return to the address in the EPC register.
Previous code resulting in the interrupted immediately returning
to the caller of the routine it was inside.
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* cpu.c (_CPU_Initialize): Do not initialize _ISR_Vector_table() here
because it has not been allocated yet.
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* cpu.c: Do not read or write raw interrupt vector table if
we are on a CPU that does not have a %vbr register and the
BSP is configured as having the table in ROM.
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* cpu.c: Removed duplicate declaration for _ISR_Vector_table.
* cpu_asm.S: Removed assembly language to vector ISR handler
on MIPS ISA I. Now call mips_vector_isr_handlers() in libcpu or BSP.
* rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): No
longer a constant -- get the real value from libcpu.
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* cpu_asm.h: Removed.
* Makefile.am: Remove cpu_asm.h.
* rtems/score/mips64orion.h: Renamed mips.h.
* rtems/score/mips.h: New file, formerly mips64orion.h.
Header rewritten.
(mips_get_sr, mips_set_sr, mips_enable_in_interrupt_mask,
mips_disable_in_interrupt_mask): New macros.
* rtems/score/Makefile.am: Reflect renaming mips64orion.h.
* asm.h: Include <mips.h> not <mips64orion.h>. Now includes the
few defines that were in <cpu_asm.h>.
* cpu.c (_CPU_ISR_Get_level): Added MIPS ISA I version of this routine.
MIPS ISA 3 is still in assembly for now.
(_CPU_Thread_Idle_body): Rewrote in C.
* cpu_asm.S: Rewrote file header.
(FRAME,ENDFRAME) now in asm.h.
(_CPU_ISR_Get_level): Removed ISA I version and rewrote in C.
(_CPU_ISR_Set_level): Removed ISA I version and rewrote in C.
(_CPU_Context_switch): MIPS ISA I now manages preserves SR_IEC and
leaves other bits in SR alone on task switch.
(mips_enable_interrupts,mips_disable_interrupts,
mips_enable_global_interrupts,mips_disable_global_interrupts,
disable_int, enable_int): Removed.
(mips_get_sr): Rewritten as C macro.
(_CPU_Thread_Idle_body): Rewritten in C.
(init_exc_vecs): Rewritten in C as mips_install_isr_entries() and
placed in libcpu.
(exc_tlb_code, exc_xtlb_code, exc_cache_code, exc_norm_code): Moved
to libcpu/mips/shared/interrupts.
(general): Cleaned up comment blocks and #if 0 areas.
* idtcpu.h: Made ifdef report an error.
* iregdef.h: Removed warning.
* rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): Now a variable
number defined by libcpu.
(_CPU_ISR_Disable, _CPU_ISR_Enable): Rewritten to use new routines
to access SR.
(_CPU_ISR_Set_level): Rewritten as macro for ISA I.
(_CPU_Context_Initialize): Honor ISR level in task initialization.
(_CPU_Fatal_halt): Use new _CPU_ISR_Disable() macro.
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* cpu.c: Added include of <rtems/rtems/cache.h> to eliminate warning.
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* rtems/score/cpu.h: When mips ISA level is 1, registers in the
context should be 32 not 64 bits.
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* cpu_asm.S: Changed "_CPU_Ccontext_switch_restore: typo to
correct name of _CPU_Context_switch_restore. Added dummy
version of exc_utlb_code() so applications would link.
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* cpu_asm.S: Fix for CPUs with FPU revision B or C.
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* cpu.c, rtems/cpu/sparc.h: Make floating point optional based
on gcc arguments. Do not initialize FP context if there is
no FPU. Flush instruction cache after installing RTEMS trap handler.
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* Makefile.am: Use ... instead of RTEMS_TOPdir in ACLOCAL_AMFLAGS.
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* Makefile.am: Switch to ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal.
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* Makefile.am: ACLOCAL_AMFLAGS= -I $(RTEMS_TOPdir)/macros.
Switch to GNU canonicalization.
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Joel Sherrill <joel@OARcorp.com>
* This is a major reworking of the mips64orion port to use
gcc predefines as much as possible and a big push to multilib
the mips port. The mips64orion port was copied/renamed to mips
to be more like other GNU tools. Alan did most of the technical
work of determining how to map old macro names used by the mips64orion
port to standard compiler macro definitions. Joel did the merge
with CVS magic to keep individual file history and did the BSP
modifications. Details follow:
* Makefile.am: idtmon.h in mips64orion port not present.
* asm.h: MIPS64ORION replaced with MIPS. Frame setup macros added.
* cpu.c: Comments added.
* cpu_asm.S: Conditionals changed. MIPS ISA level 1 support added.
First attempt at exception/interrupt processing for ISA level 1
and minus any use of IDT/MON added.
* idtcpu.h: Conditionals changed to use gcc predefines.
* iregdef.h: Ditto.
* cpu_asm.h: No real change. Merger required commit.
* rtems/Makefile.am: Ditto.
* rtems/score/Makefile.am: Ditto.
* rtems/score/cpu.h: Change MIPS64ORION to MIPS.
* rtems/score/mips64orion.h: Change MIPS64ORION to MIPS. Convert
from using RTEMS_CPU_MODEL to gcc predefines to figre things out.
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* shared/ppc.h: For multilibs, derive PPC_HAS_FPU from _SOFT_FLOAT.
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* rtems/score/cpu.h: define CPU_Exception_frame for rdbg.
* m68302.h: Make buffer pointer in m302_SCC_bd volatile.
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* cpu_asm.S, rtems/score/cpu.h: Modified to better support
multilibing. These changes result in the code being able to
compile with the default gcc settings. It is not functional
in this configuration but does compile.
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* rtems/score/c4x.h: Modified to properly multilib. This required
using only macros predefined by gcc.
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* sim.h: These changes enable RTEMS to automatically generate
the ram_init file used by gdb with the BDM patches. The 332 has
on-board chip select lines (for RAM and FLASH) that must be
configured before use of these peripherals. These patches parse
data from start.c where the chip select lines are configured in
the runtime executable and automatically generates the gdb
initialization file using the same settings. A great time saver.
A similar file, ram_init_FW (flash writable), is also generated
that the flash programming tool uses.
* BSP/start/start.c: Must be modified to support above.
* BSP/start/ram_init.ld, BSP/start/ram_init.sed: New files.
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* rtems/score/hppa.h: Switched to using cpuopts.h not
targopts.h to reduce dependency on BSP.
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* rtems/score/a29k.h, rtems/score/cpu.h: Switched to using
cpuopts.h not targopts.h to reduce dependency on BSP.
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* amd.ah, cpu.c, cpu_asm.S, register.ah, sig.S, rtems/score/cpu.h:
Updated and fixed minor things. Commented out offensive assembly
and made applications link.
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* Makefile.am, cpu_asm.S, psmacro.ah, rtems/score/cpu.h:
First attempt to compile with GNU tools. Minor modifications
to compile enough to get to assembler errors.
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* rtems/score/i386.h: Corrected "#elsif" to be "#elif".
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* Makefile.am: Use += to set up AM_CPPFLAGS.
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* rtems/score/Makefile.am: Use PROJECT_TOPdir in path to genoffsets.
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* rtems/score/Makefile.am: Use PROJECT_TOPdir in path to gensize.
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* Makefile.am: Include compile.am.
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* Makefile.am: Include compile.am, formatting.
* rtems/Makefile.am: formatting.
* rtems/score/Makefile.am: formatting.
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* Makefile.am: Include compile.am, remove duplicate includes.
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* Makefile.am: Include compile.am, formatting.
* rtems/Makefile.am: Formatting.
* rtems/score/Makefile.am: Formatting.
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* cpu.c: Spacing issues.
* rtems/score/cpu.h: Removed warning by setting _level.
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* cpu.c: Spacing issues.
* rtems/score/cpu.h: Removed warning by setting _level.
2000-08-29 Joel Sherrill <joel.sherrill@OARcorp.com>
* Makefile.am: Added S_O_FILES to list of objects.
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* Makefile.am: Added S_O_FILES to list of objects.
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* rtems/score/i386.h: cpu-variant define handling
Rewrite due to introduction of multilib defines.
* asm.h: include cpuopts.h instead of targopts.h
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* rtems/score/no_cpu.h: Modified so there are fewer and
more consistent variations on "no cpu" so it is easier
to sed the source as the starting point for a new port.
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* Shell added for or32 port based on no_cpu port with names replaced.
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