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* 2000-10-18 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-10-182-5/+13
| | | | | * rtems/score/c4x.h: Modified to properly multilib. This required using only macros predefined by gcc.
* 2000-10-12 John S Gwynne <jgwynne@mrcday.com>Joel Sherrill2000-10-123-10/+22
| | | | | | | | | | | | | | * sim.h: These changes enable RTEMS to automatically generate the ram_init file used by gdb with the BDM patches. The 332 has on-board chip select lines (for RAM and FLASH) that must be configured before use of these peripherals. These patches parse data from start.c where the chip select lines are configured in the runtime executable and automatically generates the gdb initialization file using the same settings. A great time saver. A similar file, ram_init_FW (flash writable), is also generated that the flash programming tool uses. * BSP/start/start.c: Must be modified to support above. * BSP/start/ram_init.ld, BSP/start/ram_init.sed: New files.
* 2000-09-25 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-09-252-0/+12
| | | | | * rtems/score/hppa.h: Switched to using cpuopts.h not targopts.h to reduce dependency on BSP.
* 2000-09-25 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-09-253-5/+18
| | | | | * rtems/score/a29k.h, rtems/score/cpu.h: Switched to using cpuopts.h not targopts.h to reduce dependency on BSP.
* 2000-09-22 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-09-227-8/+87
| | | | | | * amd.ah, cpu.c, cpu_asm.S, register.ah, sig.S, rtems/score/cpu.h: Updated and fixed minor things. Commented out offensive assembly and made applications link.
* 2000-09-22 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-09-225-17/+26
| | | | | | * Makefile.am, cpu_asm.S, psmacro.ah, rtems/score/cpu.h: First attempt to compile with GNU tools. Minor modifications to compile enough to get to assembler errors.
* 2000-09-12 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-09-122-1/+5
| | | | * rtems/score/i386.h: Corrected "#elsif" to be "#elif".
* 2000-09-12 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-09-122-1/+5
| | | | * Makefile.am: Use += to set up AM_CPPFLAGS.
* 2000-09-06 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-09-061-0/+4
| | | | * rtems/score/Makefile.am: Use PROJECT_TOPdir in path to genoffsets.
* 2000-09-06 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-09-061-0/+4
| | | | * rtems/score/Makefile.am: Use PROJECT_TOPdir in path to gensize.
* 2000-09-04 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-09-0527-0/+69
| | | | * Makefile.am: Include compile.am.
* 2000-09-04 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-09-052-3/+11
| | | | | | * Makefile.am: Include compile.am, formatting. * rtems/Makefile.am: formatting. * rtems/score/Makefile.am: formatting.
* 2000-09-04 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-09-052-3/+5
| | | | * Makefile.am: Include compile.am, remove duplicate includes.
* 2000-09-04 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-09-052-3/+11
| | | | | | * Makefile.am: Include compile.am, formatting. * rtems/Makefile.am: Formatting. * rtems/score/Makefile.am: Formatting.
* Correcting.Joel Sherrill2000-08-291-0/+5
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* 2000-08-28 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill2000-08-292-4/+6
| | | | | * cpu.c: Spacing issues. * rtems/score/cpu.h: Removed warning by setting _level.
* 2000-08-29 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill2000-08-291-0/+4
| | | | | | | | | | * cpu.c: Spacing issues. * rtems/score/cpu.h: Removed warning by setting _level. 2000-08-29 Joel Sherrill <joel.sherrill@OARcorp.com> * Makefile.am: Added S_O_FILES to list of objects.
* 2000-08-29 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill2000-08-291-1/+1
| | | | * Makefile.am: Added S_O_FILES to list of objects.
* 2000-08-17 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-08-254-33/+37
| | | | | | * rtems/score/i386.h: cpu-variant define handling Rewrite due to introduction of multilib defines. * asm.h: include cpuopts.h instead of targopts.h
* 2000-08-25 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill2000-08-252-3/+11
| | | | | | * rtems/score/no_cpu.h: Modified so there are fewer and more consistent variations on "no cpu" so it is easier to sed the source as the starting point for a new port.
* 2000-08-11 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-08-1113-0/+1950
| | | | * Shell added for or32 port based on no_cpu port with names replaced.
* 2000-08-11 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-08-1112-0/+1849
| | | | * Shell added for or16 port based on no_cpu port with names replaced.
* Adding ChangeLogs.Joel Sherrill2000-08-1015-0/+45
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* If the _VBR is set to 0xFFFFFFFF, then assume the vector jump table isJoel Sherrill2000-08-011-1/+10
| | | | in ROM.
* Patch rtems-rc-20000801-1-cvs.diff from Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-08-012-2/+2
| | | | that switches the sparc from targopts.h to cpuopts.h.
* Port of RTEMS to the ARM processor family by Eric ValetteJoel Sherrill2000-07-2712-0/+1771
| | | | | | <valette@crf.canon.fr> and Emmanuel Raguet <raguet@crf.canon.fr> of Canon CRF - Communication Dept. This port includes a basic BSP that is sufficient to link hello world.
* Port of RTEMS to the Texas Instruments C3x/C4x DSP families includingJoel Sherrill2000-07-2612-0/+27
| | | | | | | | | | | a BSP (c4xsim) supporting the simulator included with gdb. This port was done by Joel Sherrill and Jennifer Averett of OAR Corporation. Also included with this port is a space/time optimization to eliminate FP context switch management on CPUs without hardware or software FP. An issue with this port was that sizeof(unsigned32) = sizeof(unsigned8) on this CPU. This required addressing alignment checks and assumptions as well as fixing code that assumed sizeof(unsigned32) == 4.
* Make _ISR_Dispatch global.Joel Sherrill2000-07-171-0/+1
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* Update from Philip Quaife <rtemsdev@qs.co.nz> that was hand-merged.Joel Sherrill2000-07-172-34/+75
| | | | | | | | | | This update addresses the following: + the ISR enable/disable/flash macros now work with old gcc versions. + the UI CCR bits are now masked since other example code did so + _ISR_Dispatch disables interrupts during call setup Together these removed the instabilities he was seeing.
* Removed no cpu references.Joel Sherrill2000-07-1112-15/+15
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* Reworked score/cpu/sparc so it can be safely compiled multilib. AllJoel Sherrill2000-07-119-123/+27
| | | | | | routines and structures that require CPU model specific information are now in libcpu. This primarily required moving erc32 specific information from score/cpu files to libcpu/sparc and the erc32 BSP.
* Reworked score/cpu/i960 so it can be safely compiled multilib. AllJoel Sherrill2000-07-115-533/+31
| | | | | | | routines and structures that require CPU model specific information are now in libcpu. This required significant rework of the score/cpu header files and the creation of multiple header files and subdirectories in libcpu/i960.
* Patch rtems-rc-20000711-1-cvs.diff from Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-07-117-7/+7
| | | | | | | | | that decouples exec/ for the sh, m68k and i960 from targopts.h. NOTE: The change to system.h is a hack to enable cpuopts.h for some targets, but keep using targopts.h for others - I know it does *not* work for sparc, mips, i386 and ppc. This will have to be addressed as work continues on multilibing.
* Moved old_exception_processing and new_exception_processing directoriesJoel Sherrill2000-07-071-7/+1
| | | | | | from score/cpu to libcpu because the determination of which to use is based on RTEMS_CPU_MODEL. Thus it can not be determined based solely on multilib information.
* Interrupt stack is allocated in _ISR_Handler_initialization notJoel Sherrill2000-07-038-8/+8
| | | | _Interrupt_Manager_initialization.
* Changed extra_system_initialization_stack to extra_mpci_receive_server_stackJoel Sherrill2000-07-031-1/+1
| | | | to be consistent with other ports.
* This is the initial addition of the port of RTEMS to theJoel Sherrill2000-06-2912-0/+1979
| | | | | | | | | | | | | Hitachi H8 family. This port was done by Philip Quaife <philip@qs.co.nz> of Q Solutions and sponsored by Comnet Technologies Ltd. The port was done based on RTEMS 3.5.1 to a Hitach H8300H. The port was updated to RTEMS 4.5 style Makefiles/configure by Joel Sherrill <joel@OARcorp.com>. While doing this Joel added support for the h8300-rtems to binutils, gcc, newlib, and gdb. NOTE: Philip submitted a BSP for a Hitachi evaluation board which is being merged as a separate entity.
* Remove pragma align 4Joel Sherrill2000-06-151-2/+0
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* Patch rtems-rc-20000614-sh.tar.gz from Ralf CorsepiusJoel Sherrill2000-06-142-11/+12
| | | | | | | | | | | | | | | | | | | | | <corsepiu@faw.uni-ulm.de> that migrates the SH port to multilib'ing. This patch involved moving a number of files in the CVS repository, adding new files, and deleting files from their previous location. Ralf gave good instructions (not repeated here) and here are his notes: Note 1: In this version, I did not change the installation points of the headers which are moved inside of the source-tree. This is a temporary hack for not breaking compatibility with 4.5 based BSPs, but will probably not last once having real multilibs (We would have include file conflicts when several BSPs/CPU_MODELS share a common installation prefix). Note 2: I hope not to have broken too much, but I would not be astonished if something goes wrong. Note 3: There are more patches to come :)
* Moved PowerPC cache management code to libcpu. Also compiledJoel Sherrill2000-06-141-151/+0
| | | | | | mpc8xx libcpu support for the first time and remove includes of bsp.h, references to BSP_Configuration, and Cpu_table. All of these can be obtained directly from RTEMS now.
* Added crude i960ka support.Joel Sherrill2000-06-133-6/+38
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* Moved i386 and m68k cache management code to libcpu. EverythingJoel Sherrill2000-06-132-306/+0
| | | | | | now is an implementation of the prototypes in rtems/rtems/cache.h. The libcpu/i386/wrapup directory is no longer needed. The PowerPC needs this done to it.
* Patch from John Cotton <john.cotton@nrc.ca>, Charles-Antoine GauthierJoel Sherrill2000-06-125-10/+542
| | | | | | | | | | | | | | | <charles.gauthier@iit.nrc.ca>, and Darlene A. Stewart <Darlene.Stewart@nrc.ca> to add support for a number of very significant things: + BSPs for many variations on the Motorola MBX8xx board series + Cache Manager including initial support for m68040 and PowerPC + Rework of mpc8xx libcpu code so all mpc8xx CPUs now use same code base. + Rework of eth_comm BSP to utiltize above. John reports this works on the 821 and 860
* Works on Solaris and Linux.Joel Sherrill2000-06-121-8/+6
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* Merged from 4.5.0-beta3aJoel Sherrill2000-06-1233-88/+527
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* Patch rtems-rc-4.5.0-13-cvs.diff from Ralf Corsepius <corsepiu@faw.uni-ulm.de>.Joel Sherrill2000-04-1311-0/+66
| | | | adds .cvsignore.
* Patch rtems-rc-4.5.0-13-cvs.diff from Ralf Corsepius <corsepiu@faw.uni-ulm.de>.Joel Sherrill2000-04-1324-0/+136
| | | | adds .cvsignore.
* Added routines to get and set C3x IOF register. The code is conditionallyJoel Sherrill2000-03-012-26/+142
| | | | compiled and there is no comparable code for the C4x.
* BSP now compiles and links with CAVSL board information. This includesJoel Sherrill2000-02-291-3/+3
| | | | | | | | | | linkcmds updated, simio references removed, and switch to libchip for serial ports from simio. Added a MEMORY_MAP file to capture information about the various addresses on this board. In addition, many of the beta patches are now included.
* New port of RTEMS to TI C3x and C4x.Joel Sherrill2000-02-2212-0/+3149
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