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2018-07-06riscv: Add LADDR assembler defineSebastian Huber2-2/+12
2018-07-06riscv: Implement CPU counterSebastian Huber2-2/+16
2018-07-05riscv: Clear reservationsSebastian Huber5-6/+25
2018-07-02riscv: Fix fcsr initializationSebastian Huber2-1/+19
2018-06-29riscv: Fix SMP context switch supportSebastian Huber1-2/+2
2018-06-29riscv: Add SMP context switch supportSebastian Huber1-0/+47
2018-06-29riscv: Add floating-point supportSebastian Huber8-50/+538
2018-06-29riscv: Fix global constructionSebastian Huber1-4/+5
2018-06-29riscv: Add TLS supportSebastian Huber2-0/+9
2018-06-29riscv: Remove dead codeSebastian Huber1-41/+1
2018-06-29riscv: Optimize context switch and interruptsSebastian Huber6-174/+255
2018-06-29riscv: Fix _CPU_Context_Initialize() prototypeSebastian Huber2-12/+12
2018-06-29riscv: Fix interrupt save/restoreSebastian Huber1-1/+1
2018-06-29riscv: Implement _CPU_Context_validate()Sebastian Huber2-160/+168
2018-06-29riscv: Make some CPU port defines visible to asmSebastian Huber2-37/+49
2018-06-29riscv: Implement _CPU_Context_volatile_clobber()Sebastian Huber2-16/+16
2018-06-29riscv: Remove mstatus from thread contextSebastian Huber4-27/+14
2018-06-29riscv: Remove x8 initializationSebastian Huber1-2/+0
2018-06-29riscv: Properly align the thread stackSebastian Huber1-3/+7
2018-06-29riscv: Do not clear thread contextSebastian Huber1-5/+2
2018-06-29riscv: Fix CPU_STACK_ALIGNMENTSebastian Huber1-1/+2
2018-06-29riscv: Remove RISCV_GCC_RED_ZONE_SIZESebastian Huber2-5/+1
2018-06-29riscv: Enable interrupts during dispatch after ISRSebastian Huber5-55/+91
2018-06-28riscv: Add _CPU_Get_current_per_CPU_control()Sebastian Huber2-0/+23
2018-06-28riscv: Avoid namespace pollutionSebastian Huber3-10/+4
2018-06-28riscv: Optimize and fix interrupt disable/enableSebastian Huber1-15/+16
2018-06-28riscv: Add dummy SMP supportSebastian Huber2-125/+27
2018-06-28riscv: Implement ISR set/get levelSebastian Huber2-9/+18
2018-06-27bsp/riscv: Load global pointerSebastian Huber1-2/+0
2018-06-27riscv: Format assembler filesSebastian Huber4-435/+437
2018-06-27Rework initialization and interrupt stack supportSebastian Huber2-20/+0
2018-06-27score: Add CPU_INTERRUPT_STACK_ALIGNMENTSebastian Huber1-0/+5
2018-06-15Add _CPU_Counter_frequency()Sebastian Huber2-0/+3
2018-04-16Remove register keyword from public header filesSebastian Huber1-1/+1
2018-03-12riscv/include/rtems/score/types.h: Eliminate this fileJoel Sherrill3-72/+4
2018-01-25Remove make preinstallChris Johns11-70/+16
2017-11-29riscv/rtems/score/cpu.h: Use RTEMS_NO_RETURN not deprecated RTEMS_COMPILER_NO...Joel Sherrill1-3/+2
2017-11-01cpukit: RISC-V - make riscv32 code work for riscv64 - v2Hesham Almatary18-0/+3524