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* Include stdbool.h. Use bool as base-type for boolean.Ralf Corsepius2008-08-211-1/+2
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* Add missing prototypes.Ralf Corsepius2008-08-191-1/+1
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* 2008-07-31 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill2008-07-311-1/+1
| | | | * cpu.c, rtems/score/cpu.h: Correct prototype of Idle threads.
* 2008-06-05 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill2008-06-051-0/+13
| | | | | | | | * rtems/score/cpu.h: Add CPU_SIMPLE_VECTORED_INTERRUPTS porting parameter to indicate that the port uses the Simple Vectored Interrupt model or the Programmable Interrupt Controller Model. The PIC model is implemented primarily in the BSP and it is responsible for all memory allocation.
* 2007-12-17 Joel Sherrill <joel.sherrill@oarcorp.com>Joel Sherrill2007-12-171-0/+3
| | | | * rtems/score/cpu.h: Add _CPU_Context_Get_SP() for stack check utility.
* 2007-12-04 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill2007-12-041-18/+0
| | | | | | * cpu.c, rtems/score/cpu.h: Move interrupt_stack_size field from CPU Table to Configuration Table. Eliminate CPU Table from all ports. Delete references to CPU Table in all forms.
* 2007-12-03 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill2007-12-031-12/+0
| | | | | | | | | * rtems/score/cpu.h: Moved most of the remaining CPU Table fields to the Configuration Table. This included pretasking_hook, predriver_hook, postdriver_hook, idle_task, do_zero_of_workspace, extra_mpci_receive_server_stack, stack_allocate_hook, and stack_free_hook. As a side-effect of this effort some multiprocessing code was made conditional and some style clean up occurred.
* 2007-05-09 Ralf Corsépius <ralf.corsepius@rtems.org>Ralf Corsepius2007-05-091-1/+0
| | | | * rtems/score/cpu.h: Remove CPU_HAS_OWN_HOST_TO_NETWORK_ROUTINES.
* Use Context_Control_fp* instead of void* for fp_contexts.Ralf Corsepius2007-04-171-3/+3
| | | | Eliminate evil casts.
* 2006-11-17 Ralf Corsépius <ralf.corsepius@rtems.org>Ralf Corsepius2006-11-171-4/+0
| | | | * rtems/score/types.h: Remove unsigned64, signed64.
* 2006-08-30 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2006-08-311-2/+1
| | | | | * rtems/score/cpu.h: Revert change. It did not appear to correct all warnings.
* 2006-08-30 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2006-08-301-0/+1
| | | | * rtems/score/cpu.h:
* 2006-08-29 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2006-08-291-1/+1
| | | | * rtems/score/cpu.h: Correct inline assembly constraints.
* 2006-01-16 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2006-01-161-5/+4
| | | | | | * rtems/score/cpu.h: Part of a large patch to improve Doxygen output. As a side-effect, grammar and spelling errors were corrected, spacing errors were address, and some variable names were improved.
* 2005-11-08 Ralf Corsepius <ralf.corsepius@rtems.org>Ralf Corsepius2005-11-081-2/+2
| | | | * rtems/score/types.h: Eliminate unsigned16, unsigned32.
* 2005-02-19 Ralf Corsepius <ralf.corsepius@rtems.org>Ralf Corsepius2005-02-191-1/+1
| | | | * rtems/score/cpu.h: Remove traces from NO_CPU.
* New header guard.Ralf Corsepius2005-01-283-6/+6
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* 2005-01-24 Ralf Corsepius <ralf.corsepius@rtems.org>Ralf Corsepius2005-01-241-6/+0
| | | | | * rtems/score/types.h: Remove signed8, signed16, signed32, unsigned8, unsigned16, unsigned32.
* 2005-01-24 Ralf Corsepius <ralf.corsepius@rtems.org>Ralf Corsepius2005-01-241-16/+0
| | | | * rtems/score/h8300.h: Remove RTEMS_CPU_HAS_16_BIT_ADDRESSES.
* 2005-01-24 Ralf Corsepius <ralf.corsepius@rtems.org>Ralf Corsepius2005-01-241-0/+2
| | | | * rtems/score/types.h: #include <rtems/stdint.h>.
* 2004-12-10 Ralf Corsepius <ralf.corsepius@rtems.org>Ralf Corsepius2004-12-101-1/+1
| | | | | | PR 733/rtems * rtems/score/cpu.h: Remove output arg from inline asm in _CPU_ISR_Disable.
* Cosmetics.Ralf Corsepius2004-12-101-3/+3
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* Cosmetics.Ralf Corsepius2004-11-212-2/+0
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* 2004-11-21 Ralf Corsepius <ralf.corsepius@rtems.org>Ralf Corsepius2004-11-211-2/+2
| | | | | * rtems/score/types.h: Use __rtems_score_types_h as preprocessor guard.
* 2004-10-02 Ralf Corsepius <ralf_corsepius@rtems.org>Ralf Corsepius2004-11-023-6/+15
| | | | | | * rtems/score/cpu.h: Add doxygen preamble. * rtems/score/h8300.h: Add doxygen preamble. * rtems/score/types.h: Add doxygen preamble.
* 2004-09-29 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2004-09-291-4/+1
| | | | * rtems/score/cpu.h: i960 obsoleted and all references removed.
* 2004-03-30 Ralf Corsepius <ralf_corsepius@rtems.org>Ralf Corsepius2004-03-301-23/+23
| | | | * cpu.c, rtems/score/cpu.h: Convert to using c99 fixed size types.
* Unused.Ralf Corsepius2004-03-081-2/+0
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* 2003-09-26 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2003-09-261-7/+0
| | | | | * rtems/score/cpu.h: Obsoleting HP PA-RISC port and removing all references.
* 2003-09-04 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2003-09-043-3/+3
| | | | | * asm.h, cpu.c, cpu_asm.S, rtems/score/cpu.h, rtems/score/h8300.h, rtems/score/types.h: URL for license changed.
* 2003-08-14 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2003-08-141-1/+4
| | | | | PR 455/bsps * rtems/score/cpu.h: Added missing CPU_swap_u16().
* 2002-11-06 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2002-11-061-0/+6
| | | | | * rtems/score/cpu.h: Add prototype of H8BD_Install_IRQ to eliminate warning.
* 2002-07-05 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2002-07-051-1/+1
| | | | * rtems/score/cpu.h: Filled in something that was marked XXX.
* 2002-07-01 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2002-07-011-2/+2
| | | | | | * rtems/score/cpu.h: Fixed comments and renamed CPU_SYSTEM_INITIALIZATION_THREAD_EXTRA_STACK to CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK to be consistent with other code.
* 2001-04-03 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2002-04-031-1/+1
| | | | | | | * Per PR94, all rtems/score/CPUtypes.h are named rtems/score/types.h. * rtems/score/h8300types.h: Removed. * rtems/score/types.h: New file via CVS magic. * Makefile.am, rtems/score/cpu.h: Account for name change.
* 2002-01-07 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2002-01-081-0/+2
| | | | * rtems/score/cpu.h: #include <rtems/bspIo.h>.
* 2001-11-28 Joel Sherrill <joel@OARcorp.com>,Joel Sherrill2001-11-281-0/+7
| | | | | | | This was tracked as PR91. * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which is used to specify if the port uses the standard macro for this (FALSE). A TRUE setting indicates the port provides its own implementation.
* 2001-01-03 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-031-1/+9
| | | | | | * rtems/score/cpu.h: Added _CPU_Initialize_vectors(). * cpu_asm.S: Modify to properly dereference _ISR_Vector_table now that it is dynamically allocated.
* 2000-10-18 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-10-181-15/+12
| | | | | | | * cpu_asm.S, rtems/score/cpu.h: Modified to better support multilibing. These changes result in the code being able to compile with the default gcc settings. It is not functional in this configuration but does compile.
* Update from Philip Quaife <rtemsdev@qs.co.nz> that was hand-merged.Joel Sherrill2000-07-171-1/+51
| | | | | | | | | | This update addresses the following: + the ISR enable/disable/flash macros now work with old gcc versions. + the UI CCR bits are now masked since other example code did so + _ISR_Dispatch disables interrupts during call setup Together these removed the instabilities he was seeing.
* Interrupt stack is allocated in _ISR_Handler_initialization notJoel Sherrill2000-07-031-1/+1
| | | | _Interrupt_Manager_initialization.
* Changed extra_system_initialization_stack to extra_mpci_receive_server_stackJoel Sherrill2000-07-031-1/+1
| | | | to be consistent with other ports.
* This is the initial addition of the port of RTEMS to theJoel Sherrill2000-06-294-0/+1238
Hitachi H8 family. This port was done by Philip Quaife <philip@qs.co.nz> of Q Solutions and sponsored by Comnet Technologies Ltd. The port was done based on RTEMS 3.5.1 to a Hitach H8300H. The port was updated to RTEMS 4.5 style Makefiles/configure by Joel Sherrill <joel@OARcorp.com>. While doing this Joel added support for the h8300-rtems to binutils, gcc, newlib, and gdb. NOTE: Philip submitted a BSP for a Hitachi evaluation board which is being merged as a separate entity.