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* Remove All CVS Id Strings Possible Using a ScriptJoel Sherrill2012-05-111-2/+0
| | | | | | | | | | | | Script does what is expected and tries to do it as smartly as possible. + remove occurrences of two blank comment lines next to each other after Id string line removed. + remove entire comment blocks which only exited to contain CVS Ids + If the processing left a blank line at the top of a file, it was removed.
* 2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>Joel Sherrill2010-06-291-40/+34
| | | | | | | | PR 1573/cpukit * cpu_asm.S, rtems/asm.h, rtems/score/cpu.h: Add a per cpu data structure which contains the information required by RTEMS for each CPU core. This encapsulates information such as thread executing, heir, idle and dispatch needed.
* 2010-03-27 Joel Sherrill <joel.sherrill@oarcorp.com>Joel Sherrill2010-03-271-0/+4
| | | | * cpu.c, cpu_asm.S: Add include of config.h
* Whitespace removal.Ralf Corsepius2009-12-041-8/+8
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* 2009-03-12 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill2009-03-121-2/+2
| | | | | | | | PR 1385/cpukit * cpu_asm.S: When the type rtems_boolean was switched to the C99 bool, the size changed from 4 bytes to 1 byte. The interrupt dispatching code accesses two boolean variables for scheduling purposes and the assembly implementations of this code did not get updated.
* 2008-10-14 Joel Sherrill <joel.sherrill@oarcorp.com>Joel Sherrill2008-10-141-4/+4
| | | | * cpu_asm.S: Enable same code paths for SX. Tested on simulator.
* 2008-10-14 Steven Grunza <grunza@ulticom.com>Joel Sherrill2008-10-141-0/+3
| | | | * cpu_asm.S: Use proper diredctive for h8300/sx.
* Remove stray white spaces.Ralf Corsepius2004-04-151-1/+0
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* 2003-09-04 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2003-09-041-1/+1
| | | | | * asm.h, cpu.c, cpu_asm.S, rtems/score/cpu.h, rtems/score/h8300.h, rtems/score/types.h: URL for license changed.
* 2001-01-03 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-031-1/+1
| | | | | | * rtems/score/cpu.h: Added _CPU_Initialize_vectors(). * cpu_asm.S: Modify to properly dereference _ISR_Vector_table now that it is dynamically allocated.
* 2000-10-18 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-10-181-2/+10
| | | | | | | * cpu_asm.S, rtems/score/cpu.h: Modified to better support multilibing. These changes result in the code being able to compile with the default gcc settings. It is not functional in this configuration but does compile.
* Update from Philip Quaife <rtemsdev@qs.co.nz> that was hand-merged.Joel Sherrill2000-07-171-33/+24
| | | | | | | | | | This update addresses the following: + the ISR enable/disable/flash macros now work with old gcc versions. + the UI CCR bits are now masked since other example code did so + _ISR_Dispatch disables interrupts during call setup Together these removed the instabilities he was seeing.
* This is the initial addition of the port of RTEMS to theJoel Sherrill2000-06-291-0/+226
Hitachi H8 family. This port was done by Philip Quaife <philip@qs.co.nz> of Q Solutions and sponsored by Comnet Technologies Ltd. The port was done based on RTEMS 3.5.1 to a Hitach H8300H. The port was updated to RTEMS 4.5 style Makefiles/configure by Joel Sherrill <joel@OARcorp.com>. While doing this Joel added support for the h8300-rtems to binutils, gcc, newlib, and gdb. NOTE: Philip submitted a BSP for a Hitachi evaluation board which is being merged as a separate entity.
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