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authorJoel Sherrill <joel.sherrill@OARcorp.com>2000-10-18 12:58:29 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2000-10-18 12:58:29 +0000
commit54ba5aaad68b283d80e318148e7d7c86102b940d (patch)
treef05be9b22f67143fe30d0ab2389bee33a896c1dd /cpukit/score/cpu/h8300/cpu_asm.S
parent2000-10-18 Joel Sherrill <joel@OARcorp.com> (diff)
downloadrtems-54ba5aaad68b283d80e318148e7d7c86102b940d.tar.bz2
2000-10-18 Joel Sherrill <joel@OARcorp.com>
* cpu_asm.S, rtems/score/cpu.h: Modified to better support multilibing. These changes result in the code being able to compile with the default gcc settings. It is not functional in this configuration but does compile.
Diffstat (limited to 'cpukit/score/cpu/h8300/cpu_asm.S')
-rw-r--r--cpukit/score/cpu/h8300/cpu_asm.S12
1 files changed, 10 insertions, 2 deletions
diff --git a/cpukit/score/cpu/h8300/cpu_asm.S b/cpukit/score/cpu/h8300/cpu_asm.S
index 157ac8a026..d9c22f588e 100644
--- a/cpukit/score/cpu/h8300/cpu_asm.S
+++ b/cpukit/score/cpu/h8300/cpu_asm.S
@@ -48,6 +48,7 @@
__CPU_Context_switch:
/* Save Context */
+#if defined(__H8300H__) || defined(__H8300S__)
stc.w ccr,@(0:16,er0)
mov.l er7,@(2:16,er0)
mov.l er6,@(6:16,er0)
@@ -66,6 +67,7 @@ restore:
mov.l @(6:16,er1),er6
mov.l @(2:16,er1),er7
ldc.w @(0:16,er1),ccr
+#endif
rts
@@ -75,8 +77,10 @@ restore:
__CPU_Context_restore:
- Mov.l er0,er1
+#if defined(__H8300H__) || defined(__H8300S__)
+ mov.l er0,er1
jmp @restore:24
+#endif
@@ -96,6 +100,7 @@ __CPU_Context_restore:
__ISR_Handler:
+#if defined(__H8300H__) || defined(__H8300S__)
mov.l er1,@-er7
mov.l er2,@-er7
mov.l er3,@-er7
@@ -176,6 +181,7 @@ exit:
mov @er7+,er2
mov @er7+,er1
mov @er7+,er0
+#endif
rte
/*
@@ -191,7 +197,8 @@ exit:
_ISR_Dispatch:
- Jsr @__Thread_Dispatch
+#if defined(__H8300H__) || defined(__H8300S__)
+ jsr @__Thread_Dispatch
mov @er7+,er6
mov @er7+,er5
mov @er7+,er4
@@ -199,6 +206,7 @@ _ISR_Dispatch:
mov @er7+,er2
mov @er7+,er1
mov @er7+,er0
+#endif
rte