summaryrefslogtreecommitdiffstats
path: root/cpukit/score/cpu/arm (follow)
Commit message (Collapse)AuthorAgeFilesLines
* arm: Fix printk warnings.Chris Johns2016-06-031-16/+18
|
* score: Rename _ISR_Disable() and _ISR_Enable()Sebastian Huber2016-05-201-2/+2
| | | | | | | | | Rename _ISR_Disable() into _ISR_Local_disable(). Rename _ISR_Enable() into _ISR_Local_enable(). Remove _Debug_Is_owner_of_giant(). This is a preparation to remove the Giant lock. Update #2555.
* score: Add CPU_MAXIMUM_PROCESSORSSebastian Huber2016-03-041-0/+2
| | | | Maximum number of processors of all systems supported by this CPU port.
* _ARMV7M_Is_vector_an_irq: Use ARMV7M_VECTOR_SYSTICK instead of hardcoded 16Martin Galvan2016-02-191-1/+2
| | | | Also add a comment explaining why we use that value.
* arm: Fix Cortex-M7 supportSebastian Huber2016-02-041-1/+2
|
* score: Introduce CPU_CACHE_LINE_BYTESSebastian Huber2016-01-261-2/+4
| | | | | Add CPU_CACHE_LINE_BYTES for the maximum cache line size in bytes. The actual processor may use no cache or a smaller cache line size.
* score: Delete obsolete CPU_TIMESTAMP_* definesSebastian Huber2016-01-251-2/+0
| | | | Update #2271.
* arm: Use DWT CYCCNT for timecounter if availableSebastian Huber2016-01-211-0/+27
|
* arm: Honor cache for Cortex-M7 supportSebastian Huber2016-01-151-2/+11
|
* arm: Accept Cortex-M7 multilibSebastian Huber2016-01-151-1/+1
|
* Fix interrupt epilogue for ARMv7-AR and PowerPCSebastian Huber2015-11-121-0/+27
|
* basedefs.h: Add and use RTEMS_NO_RETURNSebastian Huber2015-10-261-2/+2
|
* SMP: Fix and optimize thread dispatchingSebastian Huber2015-09-281-15/+12
| | | | | | | | According to the C11 and C++11 memory models only a read-modify-write operation guarantees that we read the last value written in modification order. Avoid the sequential consistent thread fence and instead use the inter-processor interrupt to set the thread dispatch necessary indicator.
* ARMv7M: Improve exception handler routine and add comments on SP selectionMartin Galvan2015-09-231-11/+21
| | | | | | | | | This patch adds a brief description of how context state is saved into the SP on exception entry, and makes a few changes to _ARMV7M_Exception_default in order to make it a bit more efficient. I also removed the unused 'v7mfsz' input parameter. This should apply over Sudarshan's patch.
* Fix exception handler for supporting FPUSudarshan Rajagopalan2015-09-231-4/+4
|
* arm: Replace __sync_synchronize() implementationSebastian Huber2015-09-011-8/+19
|
* arm: Use compiler memory barrier by defaultSebastian Huber2015-09-011-1/+7
|
* Add __synch_synchronize function for armJan Sommer2015-08-012-0/+10
| | | | Fixes link failure when linking Ada programs on the raspberry pi
* arm: Include proper header fileSebastian Huber2015-07-231-3/+3
|
* score: Simplify <rtems/system.h>Sebastian Huber2015-06-261-0/+1
| | | | | Drop the <rtems/score/percpu.h> include since this file exposes a lot of implementation details.
* arm: Implement _CPU_ISR_Get_level() for ARMv7-MSebastian Huber2015-06-151-3/+3
|
* arm: Align ARM exception frame to 8 bytesDaniel Krueger2015-04-102-1/+7
| | | | | | | | | | | The stack pointer must be aligned on 8 byte boundary on ARM, so the size of the exception frame must be a multiple of 8 bytes. Otherwise we might/will get an alignment fault, when executing code in the data abort handler for example. Close #2318. Signed-off-by: Daniel Krueger <daniel.krueger@systec-electronic.com>
* cpukit: add and use CPU_Uint32ptr typeGedare Bloom2015-03-161-0/+3
|
* score: Delete unused CPU_UNROLL_ENQUEUE_PRIORITYSebastian Huber2015-03-051-2/+0
|
* ARM: Fix _ARMV4_Exception_fiq_defaultMartin Galvan2015-02-271-0/+8
| | | | | | | | In _ARMV4_Exception_fiq_default, set the F bit of the SPSR so that when it gets loaded back to the CPSR in save_more_context it won't re-enable the FIQs. Tested on a TMS570LS3137.
* score: Add _CPU_SMP_Prepare_start_multitasking()Sebastian Huber2015-02-171-0/+2
| | | | Update #2268.
* arm: Fix compile error for ARMv6-M multilibSebastian Huber2015-01-092-2/+5
| | | | | | | ARMv6-M is not supported since we cannot directly use the ARMv7-M code due to some inline assembler statements. Close #2231.
* arm: Use CPU_TIMESTAMP_USE_STRUCT_TIMESPECSebastian Huber2014-11-251-1/+1
| | | | | | | Converting 64-bit nanoseconds values into the common struct timeval or struct timespec formats requires a 64-bit division to get the seconds value. Performance analysis of high network loads revealed that this is too costly on ARM.
* arm: Fix warningSebastian Huber2014-10-101-0/+6
|
* arm/rtems/score/cpu.h: _ARMV7M_Start_multitasking needed ↵Joel Sherrill2014-10-091-1/+2
| | | | RTEMS_COMPILER_NO_RETURN_ATTRIBUTE
* Let CPU/BSP Fatal handler have access to sourceDaniel Hellstrom2014-09-101-1/+1
| | | | | | | | | Without the source the error code does not say that much. Let it be up to the CPU/BSP to determine the error code reported on fatal shutdown. This patch does not change the current behaviour, just adds the option to handle the source of the fatal halt.
* arm: PR2186: Fix compile errorSebastian Huber2014-08-141-2/+4
|
* arm: Add support for FPv4-SP floating point unitSebastian Huber2014-08-1212-45/+179
| | | | | This floating point unit is available in Cortex-M4 processors and defined by ARMv7-M. This adds basic support for other VFP-D16 variants.
* score: PR2183: Fix context switch on SMPSebastian Huber2014-07-043-24/+58
| | | | | | | | Fix context switch on SMP for ARM, PowerPC and SPARC. Atomically test and set the is executing indicator of the heir context to ensure that at most one processor uses the heir context. Break the busy wait loop also due to heir updates.
* arm: Use local label in _CPU_Context_restore()Sebastian Huber2014-07-011-2/+2
|
* arm: Add ARM_MULTILIB_HAS_BARRIER_INSTRUCTIONSSebastian Huber2014-06-022-0/+7
|
* score: Fix CPU context usage on SMPSebastian Huber2014-05-083-17/+23
| | | | | | | | | | We must not alter the is executing indicator in _CPU_Context_Initialize() since this would cause an invalid state during a self restart. The is executing indicator must be valid at creation time since otherwise _Thread_Kill_zombies() uses an undefined value for not started threads. This could result in a system life lock.
* score: Implement forced thread migrationSebastian Huber2014-05-073-0/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current implementation of task migration in RTEMS has some implications with respect to the interrupt latency. It is crucial to preserve the system invariant that a task can execute on at most one processor in the system at a time. This is accomplished with a boolean indicator in the task context. The processor architecture specific low-level task context switch code will mark that a task context is no longer executing and waits that the heir context stopped execution before it restores the heir context and resumes execution of the heir task. So there is one point in time in which a processor is without a task. This is essential to avoid cyclic dependencies in case multiple tasks migrate at once. Otherwise some supervising entity is necessary to prevent life-locks. Such a global supervisor would lead to scalability problems so this approach is not used. Currently the thread dispatch is performed with interrupts disabled. So in case the heir task is currently executing on another processor then this prolongs the time of disabled interrupts since one processor has to wait for another processor to make progress. It is difficult to avoid this issue with the interrupt latency since interrupts normally store the context of the interrupted task on its stack. In case a task is marked as not executing we must not use its task stack to store such an interrupt context. We cannot use the heir stack before it stopped execution on another processor. So if we enable interrupts during this transition we have to provide an alternative task independent stack for this time frame. This issue needs further investigation.
* score: Statically initialize _ISR_Vector_tableSebastian Huber2014-04-291-4/+0
|
* score: SMP initialization changesSebastian Huber2014-04-141-1/+5
| | | | | | | | | | | | | | | | | Add and use _CPU_SMP_Start_processor(). Add and use _CPU_SMP_Finalize_initialization(). This makes most _CPU_SMP_Initialize() functions a bit simpler since we can calculate the minimum value of the count of processors requested by the application configuration and the count of physically or virtually available processors in the high-level code. The CPU port has now the ability to signal a processor start failure. With the support for clustered/partitioned scheduling the presence of particular processors can be configured to be optional or mandatory. There will be a fatal error only in case mandatory processors are not present. The CPU port may use a timeout to monitor the start of a processor.
* score: Rename Priority_bit_map_ControlSebastian Huber2014-04-031-1/+1
| | | | Rename Priority_bit_map_Control in Priority_bit_map_Word.
* Change all references of rtems.com to rtems.org.Chris Johns2014-03-2138-38/+38
|
* arm: Add support for interrupt profilingSebastian Huber2014-03-141-0/+20
|
* arm: Fix stack alignment in interrupt handlerSebastian Huber2014-03-101-29/+19
| | | | | | According to AAPCS, section 5.2.1.2, "Stack constraints at a public interface" the stack must be 8 byte aligned. This was not the case during interrupt processing.
* score: _CPU_SMP_Get_current_processor()Sebastian Huber2014-02-211-3/+2
| | | | | | | Remove RTEMS_COMPILER_PURE_ATTRIBUTE from _SMP_Get_current_processor() and all _CPU_SMP_Get_current_processor(). Make inline ASM statements volatile again. Test smptests/smpmigration01 showed that GCC optimizes too much otherwise.
* score: Rename bsp_smp_initialize()Sebastian Huber2014-02-191-0/+2
| | | | | Rename bsp_smp_initialize() into _CPU_SMP_Initialize() since every CPU port must supply this function.
* score: Delete _Thread_BSP_contextSebastian Huber2014-02-192-35/+6
| | | | | | | | | | | | Do not return to BSP context in the exit() shutdown path. This makes it possible to re-use the initialization stack. It can be used for the interrupt stack for example. On targets with a small RAM this is a considerable benefit. This change eliminates also some special cases and simplifies the code. Delete _Thread_Set_global_exit_status(), _Thread_Get_global_exit_status() and _Thread_Stop_multitasking().
* score: Use atomic API for SMP lockSebastian Huber2014-02-173-106/+0
| | | | | Use a ticket lock implementation based on atomic operations. Delete CPU port specific SMP lock implementations.
* score: Remove volatile from asm statementsSebastian Huber2014-02-141-1/+1
| | | | | The instructions to get the processor current index have no side-effects.
* score: Add CPU counter supportSebastian Huber2014-02-141-0/+9
| | | | | | | | | Add a CPU counter interface to allow access to a free-running counter. It is useful to measure short time intervals. This can be used for example to enable profiling of critical low-level functions. Add two busy wait functions rtems_counter_delay_ticks() and rtems_counter_delay_nanoseconds() implemented via the CPU counter.
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-28 10:53:26 +0000