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2018-01-25Remove make preinstallChris Johns9-1960/+0
2017-03-28arm: Optimize context switchSebastian Huber1-36/+23
2017-03-08arm: Remove legacy execption supportSebastian Huber1-6/+0
2017-01-30bsps/arm: Fix Cortex-M DWT CPU counter.Christian Mauderer1-1/+45
2017-01-26score: Delete _CPU_Context_Fp_start()Sebastian Huber1-3/+0
2017-01-24Adding ARM VFP V2 supportKevin Kirspel1-0/+6
2017-01-24Remove CPU_BIG_ENDIAN and CPU_LITTLE_ENDIANSebastian Huber1-10/+0
2016-11-24arm: Fix _CPU_ISR_Is_enabled() for ARMv7-MSebastian Huber1-1/+1
2016-11-23score: Robust thread dispatchSebastian Huber1-0/+6
2016-11-21arm: Fix Thumb-1 targetsSebastian Huber1-0/+30
2016-11-21arm: Fix ARM_CONTEXT_CONTROL_ISR_DISPATCH_DISABLESebastian Huber1-2/+4
2016-11-18score: Add _ISR_Is_enabled()Sebastian Huber1-2/+9
2016-11-18arm: Use Per_CPU_Control::isr_dispatch_disableSebastian Huber1-3/+14
2016-11-18arm: Provide CPU_Interrupt_frame for ARMv4Sebastian Huber2-3/+55
2016-11-18rtems: Conditionally define rtems_interrupt_frameSebastian Huber1-1/+1
2016-11-18score: Move CPU_PER_CPU_CONTROL_SIZESebastian Huber2-2/+4
2016-11-18score: Remove obsolete definesSebastian Huber1-7/+0
2016-11-18arm: Use TPIDRPRW for current per-CPU controlSebastian Huber2-7/+28
2016-11-07score: Add <rtems/score/cpuimpl.h>Sebastian Huber1-0/+30
2016-10-04score/arm: Correct logic to select 64 byte cache line maximum size for Cortex-A.Pavel Pisa1-2/+2
2016-09-23score: Fix C/C++ compatibility issueSebastian Huber1-4/+0
2016-07-04score/arm: Ensure that copile time alignment is 64 bytes for Cortex-A multilib.Pavel Pisa2-2/+9
2016-07-04arm/score and shared: define ARM hypervisor mode and alternate vector table b...Pavel Pisa1-0/+1
2016-06-08score: Simplify priority bit map implementationSebastian Huber1-2/+0
2016-06-08score: Delete CPU_USE_GENERIC_BITFIELD_DATASebastian Huber1-2/+0
2016-03-04score: Add CPU_MAXIMUM_PROCESSORSSebastian Huber1-0/+2
2016-02-19_ARMV7M_Is_vector_an_irq: Use ARMV7M_VECTOR_SYSTICK instead of hardcoded 16Martin Galvan1-1/+2
2016-02-04arm: Fix Cortex-M7 supportSebastian Huber1-1/+2
2016-01-26score: Introduce CPU_CACHE_LINE_BYTESSebastian Huber1-2/+4
2016-01-25score: Delete obsolete CPU_TIMESTAMP_* definesSebastian Huber1-2/+0
2016-01-21arm: Use DWT CYCCNT for timecounter if availableSebastian Huber1-0/+27
2016-01-15arm: Accept Cortex-M7 multilibSebastian Huber1-1/+1
2015-10-26basedefs.h: Add and use RTEMS_NO_RETURNSebastian Huber1-2/+2
2015-09-01arm: Use compiler memory barrier by defaultSebastian Huber1-1/+7
2015-04-10arm: Align ARM exception frame to 8 bytesDaniel Krueger1-1/+2
2015-03-16cpukit: add and use CPU_Uint32ptr typeGedare Bloom1-0/+3
2015-03-05score: Delete unused CPU_UNROLL_ENQUEUE_PRIORITYSebastian Huber1-2/+0
2015-02-17score: Add _CPU_SMP_Prepare_start_multitasking()Sebastian Huber1-0/+2
2015-01-09arm: Fix compile error for ARMv6-M multilibSebastian Huber2-2/+5
2014-11-25arm: Use CPU_TIMESTAMP_USE_STRUCT_TIMESPECSebastian Huber1-1/+1
2014-10-10arm: Fix warningSebastian Huber1-0/+6
2014-10-09arm/rtems/score/cpu.h: _ARMV7M_Start_multitasking needed RTEMS_COMPILER_NO_RE...Joel Sherrill1-1/+2
2014-09-10Let CPU/BSP Fatal handler have access to sourceDaniel Hellstrom1-1/+1
2014-08-12arm: Add support for FPv4-SP floating point unitSebastian Huber3-9/+53
2014-07-04score: PR2183: Fix context switch on SMPSebastian Huber1-2/+12
2014-06-02arm: Add ARM_MULTILIB_HAS_BARRIER_INSTRUCTIONSSebastian Huber2-0/+7
2014-05-08score: Fix CPU context usage on SMPSebastian Huber1-2/+14
2014-05-07score: Implement forced thread migrationSebastian Huber1-0/+16
2014-04-29score: Statically initialize _ISR_Vector_tableSebastian Huber1-4/+0
2014-04-14score: SMP initialization changesSebastian Huber1-1/+5
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