| Commit message (Collapse) | Author | Age | Files | Lines |
|
|
|
|
| |
* cpu.c, rtems/score/cpu.h:
Use "__asm__" instead of "asm" for improved c99-compliance.
|
| |
|
|
|
|
|
| |
* arm_exc_abort.S, arm_exc_handler_high.c, arm_exc_handler_low.S,
arm_exc_interrupt.S, cpu.c, cpu_asm.S: Add include of config.h
|
| |
|
| |
|
| |
|
|
|
|
|
|
| |
* cpu.c, rtems/score/cpu.h: Eliminate _CPU_Thread_dispatch_pointer and
passing address of _Thread_Dispatch to _CPU_Initialize. Clean up
comments.
|
| |
|
|
|
|
| |
* cpu.c: Remove extraneous spaces.
|
| |
|
| |
|
|
|
|
| |
* cpu.c, rtems/score/cpu.h: Add void.
|
|
|
|
| |
* cpu.c: Add comment.
|
|
|
|
|
| |
* cpu.c: Add arm_cpu_mode so ARM BSP can overrid default value for
cpsr.
|
|
|
|
|
|
| |
* cpu.c, rtems/score/cpu.h: Move interrupt_stack_size field from CPU
Table to Configuration Table. Eliminate CPU Table from all ports.
Delete references to CPU Table in all forms.
|
|
|
|
|
| |
* cpu.c, score/cpu.h: Fix headers. Remove extra inline definition.
* cpu_asm.S: Note origin of Thumb support.
|
|
|
|
| |
* cpu.c: Fix headers.
|
|
|
|
|
|
|
|
|
|
| |
* cpu.c, cpu_asm.S, score/cpu.h : add support for ARM<->THUMB veneer
thumb new dir to controll CPSR/SPRS in thumb mode
2007-05-09 Ray Xu <rayx.cn@gmail.com>
* cpu.c: move do_data_abort() to libbsp/arm/shared/abort/
implement a compact do_data_abort() in simple_abort.c
|
|
|
|
|
|
|
|
|
| |
* score/cpu/arm/cpu.c, score/cpu/avr/cpu.c, score/cpu/bfin/cpu.c,
score/cpu/c4x/cpu.c, score/cpu/h8300/cpu.c, score/cpu/i386/cpu.c,
score/cpu/m68k/cpu.c, score/cpu/mips/cpu.c, score/cpu/nios2/cpu.c,
score/cpu/no_cpu/cpu.c, score/cpu/sh/cpu.c, score/cpu/sparc/cpu.c,
cpukit/sapi/src/exinit.c: Move copying of CPU Table to shared
executive initialization.
|
|
|
|
|
| |
* cpu.c: move do_data_abort() to libbsp/arm/shared/abort/
implement a compact do_data_abort() in simple_abort.c
|
|
|
|
| |
* cpu.c: Remove warning.
|
|
|
|
| |
* cpu.c, cpu_asm.S: Fixed ARM Data Abort handling.
|
| |
|
|
|
|
| |
* cpu.c, rtems/score/cpu.h: Convert to using c99 fixed size types.
|
|
|
|
|
| |
* asm.h, cpu.c, cpu_asm.S, rtems/score/arm.h, rtems/score/cpu.h,
rtems/score/cpu_asm.h, rtems/score/types.h: URL for license changed.
|
|
|
|
| |
* cpu.c: Removed warning.
|
|
|
|
| |
* cpu.c: Removed warnings.
|
|
|
|
|
|
|
|
|
| |
* cpu.c, cpu_asm.S, rtems/score/arm.h, rtems/score/cpu.h,
rtems/score/cpu_asm.h, rtems/score/types.h: ARM port works
well enough to run all sptests, tmtests, and ttcp.
In addition to general cleanup, there has been considerable
optimization to interrupt disable/enable, endian swapping,
and context switching.
|
|
|
|
|
|
|
|
|
|
|
| |
* rtems/score/cpu_asm.h: Enhanced to include register offsets.
* Makefile.am: Install rtems/score/cpu_asm.h.
* cpu.c: Significantly enhanced including the implementation of
_CPU_ISR_Get_level.
* cpu_asm.S: Improved behavior of context switch and interrupt
dispatching.
* rtems/score/arm.h: Improved the CPU model name determination.
* rtems/score/cpu.h: Improved interrupt disable/enable functions.
|
|
|
|
| |
* cpu.c: Include rtems/bspIo.h instead of bspIo.h.
|
|
|
|
|
| |
* cpu.c: Spacing issues.
* rtems/score/cpu.h: Removed warning by setting _level.
|
|
<valette@crf.canon.fr> and Emmanuel Raguet <raguet@crf.canon.fr>
of Canon CRF - Communication Dept. This port includes a
basic BSP that is sufficient to link hello world.
|