diff options
| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2007-11-06 22:51:08 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2007-11-06 22:51:08 +0000 |
| commit | 661e5de43bea5199f8e7a9f5acb85eae1daaf9ea (patch) | |
| tree | 514f1503907df66655d574d3547fe5c5b8951f84 /cpukit/score/cpu/arm/cpu.c | |
| parent | 2007-11-03 Ray Xu <rayx.cn@gmail.com> (diff) | |
| download | rtems-661e5de43bea5199f8e7a9f5acb85eae1daaf9ea.tar.bz2 | |
2007-11-03 Ray Xu <rayx.cn@gmail.com>
* cpu.c, cpu_asm.S, score/cpu.h : add support for ARM<->THUMB veneer
thumb new dir to controll CPSR/SPRS in thumb mode
2007-05-09 Ray Xu <rayx.cn@gmail.com>
* cpu.c: move do_data_abort() to libbsp/arm/shared/abort/
implement a compact do_data_abort() in simple_abort.c
Diffstat (limited to 'cpukit/score/cpu/arm/cpu.c')
| -rw-r--r-- | cpukit/score/cpu/arm/cpu.c | 45 |
1 files changed, 43 insertions, 2 deletions
diff --git a/cpukit/score/cpu/arm/cpu.c b/cpukit/score/cpu/arm/cpu.c index 6c942fe49e..87593aa019 100644 --- a/cpukit/score/cpu/arm/cpu.c +++ b/cpukit/score/cpu/arm/cpu.c @@ -43,18 +43,56 @@ void _CPU_Initialize( * * _CPU_ISR_Get_level - returns the current interrupt level */ +#define str(x) #x +#define xstr(x) str(x) +#define L(x) #x "_" xstr(__LINE__) + +#define TO_ARM_MODE(x) \ + asm volatile ( \ + ".code 16 \n" \ + L(x) "_thumb: \n" \ + ".align 2 \n" \ + "push {lr} \n" \ + "adr %0, "L(x) "_arm \n" \ + "bl " L(x)" \n" \ + "pop {pc} \n" \ + ".balign 4 \n" \ + L(x) ": \n" \ + "bx %0 \n" \ + "nop \n" \ + ".pool \n" \ + ".code 32 \n" \ + L(x) "_arm: \n" \ + :"=&r" (reg)) + +/* + * Switch to Thumb mode Veneer,ugly but safe + */ + +#define TO_THUMB_MODE(x) \ + asm volatile ( \ + ".code 32 \n"\ + "adr %0, "L(x) "_thumb +1 \n"\ + "bx %0 \n"\ + ".pool \n"\ + ".thumb_func \n"\ + L(x) "_thumb: \n"\ + : "=&r" (reg)) + +#if (!defined(__THUMB_INTERWORK__) && !defined(__thumb__)) uint32_t _CPU_ISR_Get_level( void ) { uint32_t reg = 0; /* to avoid warning */ - asm volatile ("mrs %0, cpsr \n" \ "and %0, %0, #0xc0 \n" \ : "=r" (reg) \ : "0" (reg) ); - return reg; } +#endif + + /* * _CPU_ISR_install_vector @@ -162,6 +200,9 @@ cpuExcHandlerType _currentExcHandler = _defaultExcHandler; extern void _Exception_Handler_Undef_Swi(); extern void _Exception_Handler_Abort(); extern void _exc_data_abort(); + + + /* FIXME: put comments here */ void rtems_exception_init_mngt() { |