| Commit message (Collapse) | Author | Age | Files | Lines |
|---|
| |
|
|
| |
Interrupt support for per-CPU thread dispatch disable level.
|
| | |
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The GNU assembler translates for example a
msr spsr, rN
into
msr SPSR_fc, rN
This would update only a subset of the register and leads to an
incomplete exceptions restore sequence resulting in system corruption.
Correct is this:
msr SPSR_fsxc, rN
|
| | |
|
| |
|
|
| |
Rename arm_exc_interrupt() to _ARMV4_Exception_interrupt().
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
* rtems/score/armv7m.h, armv7m-context-initialize.c,
armv7m-context-restore.c, armv7m-context-switch.c,
armv7m-exception-handler-get.c, armv7m-exception-handler-set.c,
armv7m-exception-priority-get.c, armv7m-exception-priority-set.c,
armv7m-initialize.c, armv7m-isr-dispatch.c, armv7m-isr-enter-leave.c,
armv7m-isr-level-get.c, armv7m-isr-level-set.c,
armv7m-isr-vector-install.c, armv7m-multitasking-start-stop.c: New
files.
* Makefile.am, preinstall.am: Reflect changes above.
* rtems/score/arm.h: Define ARM_MULTILIB_ARCH_V4 and
ARM_MULTILIB_ARCH_V7M.
* rtems/score/cpu.h, cpu_asm.S, cpu.c, arm_exc_abort.S,
arm_exc_handler_high.c, arm_exc_handler_low.S, arm_exc_interrupt.S:
Define CPU_HAS_HARDWARE_INTERRUPT_STACK to FALSE. Use
ARM_MULTILIB_ARCH_V4 and ARM_MULTILIB_ARCH_V7M.
|
| |
|
|
|
|
|
| |
PR 1573/cpukit
* arm_exc_interrupt.S: Add a per cpu data structure which contains the
information required by RTEMS for each CPU core. This encapsulates
information such as thread executing, heir, idle and dispatch needed.
|
| | |
|
| |
|
|
|
| |
* arm_exc_abort.S, arm_exc_handler_high.c, arm_exc_handler_low.S,
arm_exc_interrupt.S, cpu.c, cpu_asm.S: Add include of config.h
|
| | |
|
| | |
|
| |
|
