| Commit message (Collapse) | Author | Age | Files | Lines |
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The global state of enabled and disabled interrupts has to hold
interrupts really disabled by drivers and system. If the state is
combined with interrupts temporarily disabled because they are
processed at given time then it is impossible to maintain state
by interrupt handlers in drivers.
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The GNU linker does not allow a nonconstant expression for a region
length.
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Update #2695.
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Prevent garbage collection of interrupt vector table.
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startup and selftest.
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HalCoGen generated files.
The configuration is specific for TMS570LS3137 based HDK.
Pins configuration can be easily changed in
rtems/c/src/lib/libbsp/arm/tms570/hwinit/init_pinmux.c
file.
The list tms570_selftest_par_list in the file
rtems/c/src/lib/libbsp/arm/tms570/hwinit/bspstarthooks-hwinit.c
specifies peripherals which health status is examined
by parity self-test at BSP start-up. It can be easily
modified for other TMS570 family members variants same
as the selection of other tests in bspstarthooks-hwinit.c.
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Generated header file ti_herc/reg_spi.h contains complete registers
and fields set for Ti MibSPI peripheral.
Care has to be taken that only TMS570_SPI1, TMS570_SPI3 and TMS570_SPI5
are of this complete multibuffer type. TMS570_SPI2 and TMS570_SPI4
have substantial part of registers removed but else they are compatible.
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The symbol can be used by bsp_start_hook_0 when complete
RAM memory is initialization and overwritten during BSP
self-test. The test overwrites even memory used to store
return address / link register and regular resturn from
bsp_start_hook_0 is not possible then.
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Tested to work with QEMU provided Intel i82557b network controller emulation.
qemu-system-x86_64 -enable-kvm -kernel $APP_BINARY \
-vga cirrus \
-append "--console=/dev/com1" \
-serial stdio \
-net nic,vlan=1,macaddr=be:be:be:10:00:01,model=i82557b \
-net tap,ifname=tap1,vlan=1,script=no,downscript=no
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more available on i386.
This change is required to build RTEMS with classic "--enable-networking"
and link applications/tests which reference RTEMS_BSP_NETWORK_DRIVER_ATTACH.
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This makes the new Termios devices independent of device major/minor
numbers. It enables BSP independent Termios device drivers which may
reside in the cpukit domain. These drivers require an IMFS and do not
work with the device file system. However, the device file system
should go away in the future.
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This is a performance improvement for execute-in-place (XIP).
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Whether the board is restarted after application finish/exit
is controlled by BSP_RESET_BOARD_AT_EXIT configure option.
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We need the unmodified r4 for get_potential_new_heir.
This partially reverts commit 8d785f72d9610fb80a65d7848404f0f7507e026c.
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It has advantage that it is designed as free-running counter
with compare registers and can easily serve for for both
timecounter and tick interrupt.
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The BSP support is divided to startup/bspsmp_api.c file where
functions required by SuperCore are defined and BCM2836 hardware
initialization part in startup/bspsmp_init.c.
Separation is done to prevent smpfatal08 test build failure.
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processing.
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level.
New function arm_cp15_cache_invalidate_level and arm_cp15_cache_clean_level
can be used to maintain single cache level (instruction or data).
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Protection by rtems_interrupt_disable() is incompatible with SMP build.
Actual page table entries manipulation function does not need locking
and disabling cache and can be run concurrently even on multiple
CPUs as long as changes do not modify same region. If the function
is called from more threads/CPUs to modify same region with different
mapping options concurrently then there is problem at another level
of virtual address space management and has to be solved by mutex
or other locking at that level.
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The change documents meaning of codes and opens
well defined way to use cache type format for cache
examination/debugging outside of arm-cp15.h file.
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initialization starts.
The u-boot loader enables the MMU plus the data and instruction caches
in some versions which results in RTEMS boot failure.
Closes #2774.
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Adding functionality to get board serial,
power state & clock rate
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Closes #2775.
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This lets the table be changed at runtime for dynamic loading and
debugger support.
Closes #2775.
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This is old and there are better design patterns for threading and C++.
We recommend you use the new C++ standards based support.
Closes #2777.
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We always build a C++ compiler and building with C++ does not effect
RTEMS or the runtime. This patch always enabled the support. There is
no need to manually enable it any more.
You can disable C++ with '--disable-cxx'.
If an architecture does not have a C++ compiler support is automatically
disabled.
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runtime init if required.
Code works but there is problem how to setup caching for the regions
(arm_cp15_set_translation_table_entries arguments).
If ARMV7_MMU_DATA_READ_WRITE_CACHED is used then CPU
accesses are noncoherent with VideoCore and some
part of image update are not visible until pushed from
cache by other activities. If ARMV7_MMU_DATA_READ_WRITE
is used then access is extremely slow.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
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