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RTEMS Kernel, file-systems, drivers, BSPs, samples, and testsuite.
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Author
Age
Files
Lines
*
Fixed warning about pointer/integer conversion which turned out to be
Joel Sherrill
1998-08-21
1
-1
/
+1
*
Fixed discrepancies noted by John Oleynick <johno@sirius.com>.
Joel Sherrill
1998-08-21
1
-6
/
+11
*
Patches from Eric Norum
Joel Sherrill
1998-08-20
15
-41
/
+44
*
Added CVS Ids
Joel Sherrill
1998-08-20
65
-0
/
+205
*
Fixed many warnings.
Joel Sherrill
1998-08-20
35
-86
/
+162
*
Temporarily leave strsep out of the build.
Joel Sherrill
1998-08-20
1
-2
/
+4
*
Added missing file.
Joel Sherrill
1998-08-20
1
-1
/
+1
*
Removed stub implementation
Joel Sherrill
1998-08-20
3
-13
/
+4
*
FreeBSD stack compiles for the first time (except libc/strsep.c)
Joel Sherrill
1998-08-20
6
-435
/
+507
*
FreeBSD stack compiles for the first time (except libc/strsep.c).
Joel Sherrill
1998-08-20
18
-12
/
+380
*
Base files
Joel Sherrill
1998-08-20
2
-0
/
+95
*
Base files
Joel Sherrill
1998-08-20
6
-0
/
+292
*
Base version.
Joel Sherrill
1998-08-20
1
-0
/
+14
*
Base files
Joel Sherrill
1998-08-19
219
-0
/
+60194
*
Patch from Eric Valette <valette@crf.canon.fr>:
Joel Sherrill
1998-08-19
2
-53
/
+49
*
Patch from Aleksey <qqi@world.std.com>:
Joel Sherrill
1998-08-19
2
-10
/
+45
*
Patch from Aleksey <qqi@world.std.com>:
Joel Sherrill
1998-08-19
8
-21
/
+34
*
If 0 out the code which touches the chip in questionable ways for processing
Joel Sherrill
1998-08-14
1
-0
/
+6
*
Changed tm27 clear interrupt macro on all PPC BSPs except the papyrus.
Joel Sherrill
1998-08-14
1
-0
/
+5
*
Added information on caching.
Joel Sherrill
1998-08-14
1
-0
/
+13
*
Updated.
Joel Sherrill
1998-08-14
1
-1
/
+1
*
Fixed version reference
Joel Sherrill
1998-08-13
1
-1
/
+1
*
Updated.
Joel Sherrill
1998-08-13
1
-181
/
+179
*
base line -- copied from erc32
Joel Sherrill
1998-08-13
1
-0
/
+193
*
Enable TX interrupts only when we need TDAs.
Joel Sherrill
1998-08-13
1
-1
/
+0
*
Cleaned up some debugging stuff.
Joel Sherrill
1998-08-13
1
-23
/
+15
*
Don't disable the RX/TX on close in polled mode.
Joel Sherrill
1998-08-13
1
-2
/
+3
*
Patch from Chris Johns <ccj@acm.org> to change the way in which the initial
Joel Sherrill
1998-08-13
1
-2
/
+5
*
fixed spacing
Joel Sherrill
1998-08-13
1
-16
/
+14
*
Removed spurious prints and cleaned up XXX.
Joel Sherrill
1998-08-12
1
-11
/
+10
*
Added more debug information. There are probably debug prints left in.
Joel Sherrill
1998-08-12
1
-24
/
+53
*
Fixed bug where the last link of the RDA was not initialized properly.
Joel Sherrill
1998-08-12
1
-15
/
+30
*
Added SONIC_DEBUG_DESCRIPTORS and changed debug level.
Joel Sherrill
1998-08-11
1
-3
/
+11
*
Survives 16-20 packets. Appears to be ok on TX buffer management.
Joel Sherrill
1998-08-10
1
-11
/
+16
*
Added prints
Joel Sherrill
1998-08-10
1
-1
/
+2
*
Can now reply to multiple successive pings successfully without being in
Joel Sherrill
1998-08-10
2
-29
/
+22
*
replies to ping -- forced into prosmiscuous mode
Joel Sherrill
1998-08-10
1
-13
/
+21
*
Reordered some stuff.
Joel Sherrill
1998-08-08
1
-7
/
+10
*
Corrected spacing.
Joel Sherrill
1998-08-08
1
-1
/
+1
*
Changed debug level.
Joel Sherrill
1998-08-08
2
-36
/
+96
*
Removed SonicRegisters structure since we now use register indices
Joel Sherrill
1998-08-06
1
-83
/
+15
*
Enabled specific types of debug info.
Joel Sherrill
1998-08-06
1
-31
/
+55
*
Changed debug enable macros to support individually enabling different
Joel Sherrill
1998-08-06
1
-15
/
+30
*
Card Resource Register was a 16-bit register not a 32-bit one.
Joel Sherrill
1998-08-06
5
-28
/
+36
*
Added support for the Card Resource Register. The new probe routines
Joel Sherrill
1998-08-06
5
-8
/
+107
*
Commented out the code which yields the CPU when the serial controller is
Joel Sherrill
1998-08-05
3
-0
/
+6
*
Added constants which made the multiple bit settings more readable
Joel Sherrill
1998-08-05
1
-0
/
+25
*
DCR setting changed to match what the DY-4 Firmware initialized it to.
Joel Sherrill
1998-08-05
1
-135
/
+259
*
Patch from Eric Valette <valette@crf.canon.fr> which brings the i386ex BSP
Joel Sherrill
1998-08-05
25
-79
/
+379
*
Automatic CPU type detection code from Eric Valette <valette@crf.canon.fr>.
Joel Sherrill
1998-08-05
13
-28
/
+691
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