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* sparc: Move <libcpu/byteorder.h>Sebastian Huber2018-01-023-71/+0
| | | | | Update #3254. Update #3260.
* bsp/mpc55xxevb: Move <bsp/irq.h>Sebastian Huber2018-01-023-510/+0
| | | | | Update #3254. Update #3268.
* arm: Move <libcpu/arm-cp15.h> to cpukitSebastian Huber2017-12-133-2265/+0
| | | | Update #3254.
* bsps/sh: Delete libcpu/shSebastian Huber2017-12-084-52/+0
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* bsp/gensh4: Move libcpu files to BSPSebastian Huber2017-12-0815-4409/+0
| | | | Update #3254.
* bsp/gensh2: Move libcpu files to BSPSebastian Huber2017-12-0816-3067/+0
| | | | Update #3254.
* bsp/gensh1: Move libcpu files to BSPSebastian Huber2017-12-0814-2074/+1
| | | | Update #3254.
* bsp/shsim: Move libcpu files to BSPSebastian Huber2017-12-084-239/+0
| | | | Update #3254.
* bsp/csb337: Move libcpu files to BSPSebastian Huber2017-12-0818-2466/+0
| | | | Update #3254.
* bsp/smdk2410: Move libcpu files to BSPSebastian Huber2017-12-0811-1983/+0
| | | | Update #3254.
* bsp/rtl22xx: Move libcpu files to BSPSebastian Huber2017-12-089-941/+0
| | | | Update #3254.
* bsp/csb336: Move libcpu files to BSPSebastian Huber2017-12-088-895/+0
| | | | Update #3254.
* bsps/arm: Remove obsolete s3c2400Sebastian Huber2017-12-081-3/+1
| | | | Update #3254.
* bsp/gumstix: Move libcpu files to BSPSebastian Huber2017-12-0810-721/+1
| | | | Update #3254.
* bsps: Do not install <libcpu/cache.h>Sebastian Huber2017-12-0830-147/+10
| | | | | | This is a cache manager implementation header file. Update #3254.
* bsps/or1k: Avoid <libcpu/cache.h>Sebastian Huber2017-12-071-2/+1
| | | | Update #3254.
* bsps/powerpc: Fix mpc83xx_i2cdrv.h locationSebastian Huber2017-12-073-17/+16
| | | | Update #3254.
* powerpc: Replace BSP_panic() with rtems_panic()Sebastian Huber2017-11-221-3/+3
| | | | | | | | Due to a new rtems_panic() implementation, it is possible to replace the PowerPC-specific BSP_panic() with rtems_panic(). Remove BSP_panic() implementations. Close #3245.
* bsps/powerpc: Fix PPC_EXC_CONFIG_USE_FIXED_HANDLERSebastian Huber2017-11-201-0/+7
| | | | | | For the SPE support we must store the upper half of r3 as well. Update #3085.
* bsps/powerpc: Fix robust thread dispatch againSebastian Huber2017-10-091-3/+1
| | | | | | Use the saved MSR to account for FPU and AltiVec settings. Update #2811.
* bsps: Fix integer to/from pointer warningsSebastian Huber2017-09-282-4/+4
| | | | Update #3082.
* bsps/powerpc: Fix print format warningsSebastian Huber2017-09-282-37/+37
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* bsps/powerpc: Fix robust thread dispatchSebastian Huber2017-09-211-6/+21
| | | | | | | Implement thread dispatch code in ppc_exc_wrapup() similar to ppc_exc_interrupt(). Update #2811.
* bsps/powerpc: Fix PPC_EXC_CONFIG_USE_FIXED_HANDLERSebastian Huber2017-09-202-4/+6
| | | | | | Fix link-time error on BSPs not using PPC_EXC_CONFIG_USE_FIXED_HANDLER. Update #3085.
* bsps/powerpc: PPC_EXC_CONFIG_USE_FIXED_HANDLERSebastian Huber2017-09-193-179/+107
| | | | | | | | | Make PPC_EXC_CONFIG_USE_FIXED_HANDLER mandatory for BSPs using ppc_exc_interrupt(). Pass exception number to bsp_interrupt_dispatch() to allow processing of decrementer and doorbell exceptions as hypervisor guest. Update #3085.
* bsps: Clock_driver_support_install_isr()Sebastian Huber2017-09-185-25/+10
| | | | | | | Remove old ISR parameter since is not used by the clock driver shell. Make an implementation optional. Update #3139.
* Simplify and unify BSP_output_charSebastian Huber2017-09-122-5/+0
| | | | | | | | The BSP_output_char should output a char and not mingle with high level processing, e.g. '\n' to '\r\n' translation. Move this translation to rtems_putc(). Remove it from all the BSP_output_char implementations. Close #3122.
* Include missing <string.h>Sebastian Huber2017-08-252-0/+2
| | | | Update #2133.
* powerpc: PPC64_NOP_FOR_LINKER_TOC_POINTER_RESTORESebastian Huber2017-08-222-0/+4
| | | | | | | In 64-bit mode, the linker must have the ability to restore the TOC pointer after an external function call. Update #3082.
* bsp/qoriq: Use LA to load an addressSebastian Huber2017-08-221-0/+8
| | | | | | Add 64-bit support for LA. Update #3082.
* bsps/powerpc: Rename ppc_exc_wrap_async_normal_endSebastian Huber2017-08-221-1/+1
| | | | | | | Rename ppc_exc_wrap_async_normal_end to ppc_exc_interrupt_end to avoid a bit of obfuscation. Update #3082.
* bsps/powerpc: Add 64-bit SET_SELF_CPU_CONTROLSebastian Huber2017-08-221-7/+12
| | | | Update #3082.
* powerpc: Add 64-bit context/interrupt supportSebastian Huber2017-08-227-151/+147
| | | | Update #3082.
* powerpc: 64-bit _CPU_Context_Initialize() supportSebastian Huber2017-08-222-7/+13
| | | | Update #3082.
* bsps/arm: Add ARMv7-AR Generic Timer supportSebastian Huber2017-08-041-0/+322
| | | | Update #3090.
* Optional Clock_driver_support_shutdown_hardware()Sebastian Huber2017-08-042-8/+8
| | | | | Make Clock_driver_support_shutdown_hardware() optional. This avoids the atexit() support on memory constrained targets.
* bsps/powerpc: Add PPC_EXC_INTERRUPT_FRAME_SIZESebastian Huber2017-08-012-2/+4
| | | | | | Use a specific define for the interrupt exception frame size. Update #3082.
* bsps/powerpc: Rename ppc_exc_wrap_async_normalSebastian Huber2017-08-011-3/+3
| | | | | | | Rename ppc_exc_wrap_async_normal to ppc_exc_interrupt to avoid a bit of obfuscation. Update #3082.
* bsp/qoriq: Simplify fatal exceptionsSebastian Huber2017-07-313-2/+236
| | | | | | | Avoid use of small-data area, since it is not supported in the ELFv2 ABI by GCC. Update #3082.
* bsps/powerpc: Fix format specifiersSebastian Huber2017-07-311-39/+39
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* sparc: Add lazy floating point switchSebastian Huber2017-07-251-1/+125
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The SPARC ABI is a bit special with respect to the floating point context. The complete floating point context is volatile. Thus, from an ABI point of view nothing needs to be saved and restored during a context switch. Instead the floating point context must be saved and restored during interrupt processing. Historically, the deferred floating point switch was used for SPARC and the complete floating point context is saved and restored during a context switch to the new floating point unit owner. This is a bit dangerous since post-switch actions (e.g. signal handlers) and context switch extensions may silently corrupt the floating point context. The floating point unit is disabled for interrupt handlers. Thus, in case an interrupt handler uses the floating point unit then this will result in a trap (INTERNAL_ERROR_ILLEGAL_USE_OF_FLOATING_POINT_UNIT). In uniprocessor configurations, a lazy floating point context switch is used. In case an active floating point thread is interrupted (PSR[EF] == 1) and a thread dispatch is carried out, then this thread is registered as the floating point owner. When a floating point owner is present during a context switch, the floating point unit is disabled for the heir thread (PSR[EF] == 0). The floating point disabled trap checks that the use of the floating point unit is allowed and saves/restores the floating point context on demand. Update #3077.
* bsps/sparc: Fix cache supportSebastian Huber2017-07-191-4/+9
| | | | | | | Fix infinite loop in rtems_invalidate_multiple_instruction_lines(). Implement this function. Close #3080.
* sparc: Add assembly workaround for LEON3FT B2BST errataDaniel Cederman2017-07-172-0/+40
| | | | | | | | | | | | | | | This patch adds NOP instructions to prevent instruction sequences that are sensitive to the LEON3FT B2BST errata. See GRLIB-TN-0009: "LEON3FT Stale Cache Entry After Store with Data Tag Parity Error" for more information. The sequences are only modified if __FIX_LEON3FT_B2BST is defined. The patch works in conjunction with the -mfix-ut700, -mfix-gr712rc, and -mfix-ut699 GCC flags that prevents the sensitive sequences from being generated. Update #3057.
* bsps: Improve interrupt vector enable/disable APISebastian Huber2017-06-206-46/+30
| | | | | | Change bsp_interrupt_vector_enable() and bsp_interrupt_vector_disable() to not return a status code. Add bsp_interrupt_assert() and use it to validate the vector number in the vector enable/disable implementations.
* Add the i2c driver for Beaglebone BlackSichen Zhao2017-06-141-0/+136
| | | | | | | | | | Update ticket #2891 and my GSOC project add c/src/lib/libbsp/arm/beagle/i2c/bbb-i2c.c modify c/src/lib/libbsp/arm/beagle/include/i2c.h modify c/src/lib/libbsp/arm/beagle/include/bbb-gpio.h modify c/src/lib/libcpu/arm/shared/include/am335x.h modify c/src/lib/libbsp/arm/beagle/Makefile.am Now can read the EEPROM by i2c, the test application link is: https://github.com/hahchenchen/GSOC-test-application
* Simplify TLS support in context switchSebastian Huber2017-06-091-1/+0
| | | | | | There is no need to save the thread pointer in _CPU_Context_switch() since it is a thread invariant. It is initialized once in _CPU_Context_Initialize().
* Add support for IBM PowerPC 750 chip.Phong Pham2017-05-293-0/+6
| | | | Closes #3015.
* build-system: Parallel build all subdirs.Chris Johns2017-05-241-1/+1
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* sparc: Adjust assembly to improve compability with LLVMJacob Hansen2017-05-143-5/+5
| | | | | | | | | | | | | - All references of %0 changed to %g0 - 'call label,0' changed to 'call label'. According to the sparc specification call does not take any registers - '.seg "text"' changed to '.section ".text"' - the synonym stub is replaced with stb - the synonym stuh is replaced with sth
* sh/sh7750/sci/sh4uart.c: ix misleading indentation warningJoel Sherrill2017-04-241-1/+1
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